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Hi,
In datasheet of Bidirectional level translator part# TXB0108PWR, page no. 18 it has been mentioned
Information: VCCA supply in my board which is 3.3V takes 3 msec (Rise time = 3msec) to get stable, refer image below.
Query: Can you please provide any reference design using discrete by which i can control OE Pin effectively as per requirement in datasheet i.e. OE Pin should sense 3.3V after VCCA 3.3V gets stable ?
Also please provide Pull down resistor calculations ?
Circuit for your reference which needs modification to control OE Pin
The datasheet says that if the outputs must be in the high-impedance state during power up, then you need a pull-down resistor (and your microcontroller needs to pull the line up when it is ready).
If the outputs do not need to be in the high-impedance state during power up, then you can connect OE directly to VCC.
Thank you Clemens for clarification regarding OE pin.
Having another query regarding Pull-ups in DATA I/O Lines.
Query 2: In previous design there were no Level translator but DATA I/O Lines were having 10K Pull-up in old design already (refer image below) however in new design since i am introducing TXB0108PWR so i have changed existing Pull-Up from 10K to 100K because datasheet mentioned the same to use above 50K if really required. Can you please confirm if this is good enough ?
Query 3: Can you please let me know Drive strength of this part ? in datasheet it just mentioned low. Please help to get value
Hi Puspam,
Query 2: In previous design there were no Level translator but DATA I/O Lines were having 10K Pull-up in old design already (refer image below) however in new design since i am introducing TXB0108PWR so i have changed existing Pull-Up from 10K to 100K because datasheet mentioned the same to use above 50K if really required. Can you please confirm if this is good enough ?
Yes- 100kohms are sufficient values to not contend with the internal 4k series driver.
Query 3: Can you please let me know Drive strength of this part ? in datasheet it just mentioned low. Please help to get value
The drive strength is 20uA maximum. It is designed this way to allow for auto-bidirectionality feature.
Regards,
Jack
2. 100 kΩ is OK in theory, but what is their purpose? The TXB's outputs are stronger; if a signal is low, it will stay low.
3. 20 µA
Hi Jack,
Thanks for your response. Since drive strength is very less 20uA maximum will it able to drive Input Pins of NXP make Microcontroller MPC555 connected at B Port of level translator and A port which is connected to Xilinx make FPGA Spartan 7 ?
Regards,
Puspam
Hi Clemens,
Thanks for your response. Since drive strength is very less 20uA maximum will it able to drive Input Pins of NXP make Microcontroller MPC555 connected at B Port of level translator and A port which is connected to Xilinx make FPGA Spartan 7 ?
Regards,
Puspam
'A' port of TXB is connected to Xilinx make FPGA Spartan 7 which is configured as LVTTL I/Os.
Can you please suggest if TXB is able to drive LVTTL I/Os ?