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SN74AXC8T245-Q1: Definition of "Input transition rise or fall rate"

Part Number: SN74AXC8T245-Q1

Hello Expert,

We'd like to confirm about the definition of "Input transition rise or fall rate".

Datasheet said "Input transition rise or fall rate " should be smaller than 10ns/V.

Does it apply only for the invalid voltage rage as like as VIH-VIL threshold?

As far as I confirmed, there is 2 type of description in E2E as below.

It is only for invalid voltage range : https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1248011/sn74lv06a-about-l-transition-rate-specification/4725650?tisearch=e2e-sitesearch&keymatch=Input%252525252525252520transition%252525252525252520rise%252525252525252520or%252525252525252520fall%252525252525252520rate#4725650

It is for all point for edge : https://e2e.ti.com/support/logic-group/logic/f/logic-forum/1183935/sn74avc6t622-about-input-transition-rise-or-fall-rate?tisearch=e2e-sitesearch&keymatch=Input%25252520transition%25252520rise%25252520or%25252520fall%25252520rate#

I think logic circuit input's knee around top and bottom should have slower edge rate than middle point due to logic output stage is constant voltage drive.
If we applied this requirement for all point of slope, it is difficult to confirm about whether it is in recommended range due to there isn't any clear criteria as like as slew rate(10% <=> 90%).
Also, this limitation is to avoid oscillation and shoot-trough current by unclear input so this requirement is sufficient until the voltage level become clear.

Therefore, I think this limitation only apply for invalid voltage range but there are some mismatched answer on E2E so I'd like to make sure about it.

Best regards,
Kazuki Kuramochi

  • Hi Kazuki,

    Please note that the transition rate is measured per voltage. I.E. 10 ns/V for example indicates the input needs to transition faster than 10 ns per 1 V clarifying how regardless of 10 to 90 % threshold of VIL/VIH limit as the transition 1V can be at any VIL/VIH level depending on what VCC is.

    Hence if you look at it from VIL/VIH perspective, the 10 ns/V can have different thresholds at different VCC levels. I.E 1.2 V VCC may have some margin than 0.9 V VCC in the sense that each 1 V simply needs to be faster than 10 ns, thanks. 

    Best Regards,

    Michael. 

  • The limit applies to all points of the edge between VIL and VIH. (Shoot-through currents happen when the voltage is between VIL and VIH, so you want to minimize the time in this interval. Oscillations happen when you have a slow edge at the switching threshold, which is somewhere between VIL and VIH, but typically near VCC/2.)

    (My answer in the second linked question was incomplete; I was trying to emphasize that you must not compute the slope as the average between VIL and VIH.)

  • Hi Michael, Clemens,

    Thank you for your description.

    I understand that input transition rise to fall rate should be applied for VIL-VIH.

    The customer use case is input side VCC is 3.3V so it will be 0.8V-2V.
    Therefore, the actual time requirement will be shorter than 12ns.

    Best regards,
    Kazuki Kuramochi