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SN74LVC244A: Is it safe to leave SN74LVC244A inputs tristated during output enable deassertion?

Part Number: SN74LVC244A
Other Parts Discussed in Thread: SN74LVCH244A, SN74LVC541A

Tool/software:

Hello,
Requesting a response to my query.

Background:
I'm using a SN74LVC244A octal buffer on a daughter board connected to a unidirectional parallel data bus. The buffer's output enable (OE) is asserted when the bus is active and address bits matches. However, the bus signals sometimes go into a tristate state due to multiplexing and buffering on the host board.

My question is: Can I safely leave the inputs to the octal buffer in a tristate/floating state while the IC remains powered but the output enable is deasserted?

Thanks & regards,

Abin

Notes:
1) I'm using a buffer instead of bus switch as the bus signals need to drive multiple ICs.
2) I guess the the below note is for ICs during its operation and not while it is disabled.

  • No; the inputs are always active. If the input signals can go inactive, then you have to add pull-up/-down resistors or use the SN74LVCH244A.

    You might prefer the SN74LVC541A for easier board routing, but the variant with bus-hold inputs exists only with 16 channels.