I have a 20MHz Reference Clock application which has 1.8V output from LVCMOS FPGA I/O and requires conversion to TTL level output. TTL level is driving into a 50 ohm coax load so I am assuming a 50 ohm source impedance which would yield approx. 2.5V at 50 ohm load end of cable which still meets TTL 2-5V VIH level. I was thinking about possibly using SN74LVC2T35 or 2 SN74LVC1G97 or SN74LVC2G132 with gates connected in parallel to yield higher drive current required to drive 50 ohm load. Would you recommend one of these options and/or could you make a recommendation. I also have a 20MHz Reference Clock input application which would be 5V TTL in (possibly into 50 ohm load) and converted to 1.8V LVCMOS to drive FPGA I/O.