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Regarding SN74LVC2G74-EP electrical/logic characteristics

Archana Rao
Intellectual 915 points
Other Parts Discussed in Thread: SN74LVC2G74-EP

We are using SN74LVC2G74-EP in our design and have few queries regarding the part.

 

(a)    The state of input pins (in our design) have been set as PRE_N = 1, CLR_N = 1, CLK = 0, D=1.   As per the truth table mentioned in the datasheet, the outputs Q and Q_N would assume previous states.

        Can you please let us know what would be the logic/state of the outputs during power-up?

 (b)   The maximum input current for data or control inputs has been defined as +/- 5uA.  Does +/-5uA define the maximum sourcing and sinking capability of the input pins? Can these pins handle more current than defined in the datasheet?

 Awaiting for your response…

 

Regards,

Archana Rao

  • 0
    Guru 257760 points

    The initial state of the output pins is undefined. See Power-Up Behavior of Clocked Devices (SCHA005).

    CMOS inputs are the gates of MOSFETs, so they have approximately infinite impedance and are not designed to source or sink any current. There is some leakage current, which is typcially much lower than the specified maximum.

  • 0 in reply to Clemens Ladisch
    Intellectual 915 points
    Hi Clemens,

    Thank you for your reply.

    The document " Power-Up Behavior of Clocked Devices " provided us a good insight. We have changed our design slightly to put the output pins in a logic high state during power up.

    The document also suggests usage of pull up/down resistors on input pins. In our design, we are pulling up the CLR_n pin high using 4.75k resistor and D input with 1k pull down resistor. CLR_n and D input are not connected to processor or any controller.

    Is there any specification that the pull-up/down should be strong or weak?
    Will 4.75k and 1k resistor suffice for considering pull up and pull down conditions on CLR_n and D input pins respectively?

    Regards,
    Archana Rao
  • 0 in reply to Archana Rao
    Guru 257760 points
    The pull-up/-down resistors must be sized so that some other circuit can drive them in the opposite direction.

    But if a CMOS input does not need to be switched, you can connect it directly to VCC or GND.