Hello,
please consider ringing issue closed; we are experiencing a very blocking issue on the buffer when we want to perform EFT burst tests.
We are assisting at the following problem:
focusing on the *nCS0 signal (a chip select), in normal operation the BP_A_nCS0 is toggled by the CPU and output levels are 0V or 3.3V as expected.
when we inject the burst we see that in some case the BP_A_nCS0 is not at the default state of 3.3V, but around 1.5V, and remains at that level; the buffer seems to work because if CPU toggles the signal i can see the output toggling from 0V to 1.5V
In this scenario:
0) the VME buffer under exam is placed on a CPU board and it is used to manage a backplane architecture with several I/O board capability; each I/O board is accessed by each CS
1) there is not any I/O board populated (i.e.: I/O board is unplugged so CS signal has no load, except terminations)
2) the buffer is quite hot, so it seems like a clash is occurring; since no I/O board is present, there is no any peer forcing the CS, expect the buffer itself, so in my opinion the clash is inside the IC
3) see below attached the schematic of the buffer, and the used termination (2 termination, FAR and NEAR the CPU, each having 330R/470R voltage divider)
Please help us understanding why under EFT burst the buffer stops working
Many thanks in advance
