I am planning to use TI's LOW POWER, 1.8/2.5/3.3-V INPUT, 3.3-V CMOS OUTPUT, SINGLE SCHMITT-TRIGGER BUFFER GATE (PART NO: SN74AUP1T17) in my design. I would like to know if this particular buffer is capable of accepting rise times as high as 500-600 ns. I couldn't find any such detail in the datasheet for this buffer.Can you help me on this.
Also is it possible to get the spice model for the same