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SN74LVC1G08: 74LVC1G08GW competitor

Part Number: SN74LVC1G08
Other Parts Discussed in Thread: SN74LVC1G57

Hi Sirs,

Sorry to bother you.

We will use TI SN74LVC1G08 to replace NXP 74LVC1G08GW

We think it's p2p.

Our end customer saw NXP datasheet have show "Schmitt trigger action at all inputs makes the circuit tolerant of slower input rise and fall time" but TI didn't.

So, new inquire is "single 2-input OR/AND gate with Schmitt-Trigger inputs"

Also end customer need TI to explain it. Could you help it?

Thanks!!

  • "Schmitt trigger action" is not the same as a real Schmitt trigger.

    LVC Characterization Information (SCBA011) says:

    An input hysteresis of approximately 100 mV is inherent to the LVC process geometry, which ensures the devices are free from oscillations by increasing the noise margin around the threshold voltage.

    NXP's actual maximum rise/fall time is 20 or 10 ns/V:

    This is the same specifiction as for TI's LVC (except for 5 V, where TI requires less than 5 ns/V).

  • Hello Shu-Cheng,

    "Schmitt trigger action" -- which is what the above datasheet says (not "Schmitt-trigger inputs") is a marketing term to indicate a slightly improved tolerance to slow inputs. The Nexperia 74LVC1G08 does _not_ have Schmitt-trigger inputs.

    You can see this in their datasheet in 2 locations:

    (1) In section 9, Recommended operating conditions:

    dt/dV -- input transition rise and fall rate is listed as 20ns/V (max)

    (2) In section 10, Static characteristics

    There is no mention of VT+, VT-, or dVT -- which are the specs required for Schmitt-trigger inputs.

    If the customer needs true Schmitt-trigger inputs on a 2-input AND gate, they will have to use a different device.  One example is the SN74LVC1G57, which can be easily configured as a 2-input AND gate, and has true Schmitt-trigger inputs.  Note that the datasheet shows specs for VT+, VT- and dVT in the Electrical Characteristics table, section 6.5

  • Thanks Clemens - beat me to it.