How to know what is the minimum capture range of CD74HCT7046A PLL chip

Daniel Guidotti

where to find nonlinear phase-slip phase lock loops or frequency lock loops with specified frequency capture range, say of about 0.01 x f0 to 0.1 x f0, where f0 is the VCO center frequency?

over 5 years ago

0 Emrys Maier over 5 years ago

TI__Guru* 96681 points

Hello Daniel,
I'm going to ask our PLL experts to respond to this - I don't think you're after a standard logic PLL.

0 Arvind Sridhar over 5 years ago in reply to Emrys Maier

TI__Mastermind 24205 points

Hi Daniel,
What is your frequency range of interest?
Regards
Arvind Sridhar

0 Dean Banerjee over 5 years ago

TI__Mastermind 27641 points

Daniel,

I am not familar with this device and I have only worked with charge pump PLLs and anybody who has is free to chime in.

That being said, I think that your answer might be in Floyd Gardners traditional book on PLLs. It says the lock in range is equal to the loop gain. In this case, I think that this means you take the VCO gain times the phase detector gain times the loop filter gain. From the typical performance curves, it seems the VCO gain is on the order of 20MHz/V

But maybe it's just easier to look on page 21 where it says for an RC filter:
"A small capture range (2Fc) is obtained if t > 2*Fc ~ (1/pi)*(2*pi*FL/T1)

Regards,
Dean

Logic

Logic forum

How to know what is the minimum capture range of CD74HCT7046A PLL chip