SN74AHC125-Q1: Delay time: tpLH-tpHL

Shinya Sawamoto

Part Number: SN74AHC125-Q1

Hello team,

I have a question about delay time for SN74AHC125-Q1.

The tPLH and tpHL variation range on the switching characteristics looks same.
Does it mean both of them can be varied to the same direction?
I would like to expect that |tpLH-tpHL|~=0 for keep the signal duty from IN to OUT.

Thanks in advance.
Shinya Sawamoto

over 5 years ago

0 Clemens Ladisch over 5 years ago

Guru 257000 points

Section 4.9.15 of Understanding and Interpreting Standard-Logic Data Sheets (SZZA036) says:

t_sk(l) Limit Skew

[…]
The difference between: the greater of the maximum specified values of t_PLH and t_PHL and the lesser of the minimum specified values of t_PLH and t_PHL. Limit skew is not directly observed on a device and is calculated from the data sheet limits for t_PLH and t_PHL. t_sk(l) quantifies for the designer how much variation in propagation delay time is induced by operation over the entire ranges of supply voltage, temperature, output load, and other specified operating conditions. Specified as such, t_sk(l) also accounts for process variation.

This description implies that |t_PLH − t_PHL| cannot be expected to always be zero.

From a more technical point of view: The output transistors are designed to be symmetrical (and they look that way in this die shot, if I have identified them correctly), but there can be no guarantee that various operating conditions affect the N-channel and P-channel MOSFETs in exactly the same way.

0 Shinya Sawamoto over 5 years ago in reply to Clemens Ladisch

TI__Expert 5260 points

Thanks for your detailed answer.
I may send you an email when further discussion is needed.

Regards,
Shinya Sawamoto

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SN74AHC125-Q1: Delay time: tpLH-tpHL