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CD4541B: Power on reset (necessity and gating)

Part Number: CD4541B

First question: am I correct that the state of the Q output is undefined at power-on if the chip is turned on with AR pulled HIGH?  And I will take it the state will stay undefined until a Manual Reset pulse is given in that case?  Or is the CD4541B's Q output guaranteed to power up in its inactive state if the chip is turned on with AR pulled HIGH?

Second (and thornier) question: is it feasible to use a reset-supervisor's output to "gate" the Auto Reset functionality of the CD4541B on during power-on, and off for the rest of the time? Is there some sort of minimum trigger voltage for the internal Auto Reset I need to be aware of? (I ask because I'm dealing with a battery powered app where an extra 30uA of current draw for a few seconds at powerup is far more acceptable than an extra 30uA of quiescent current draw)