SN74LV4T125: max frequency

Part Number: SN74LV4T125
Other Parts Discussed in Thread: SN74LVC125A, SN74LV1T125

Hi Team,

On one of our board, a SN74LV4T125 is used to buffer SPI clock, MOSI and CS. What is the max. frequency it supports? The SPI runs at 63MHz and I found it enlarges the edges too much. Refer to “SPI CLK on CM before and after buffer.png”. Which driver/buffer is recommended at this frequency? Thanks.

Regards,

Ramon

over 3 years ago

0 Clemens Ladisch over 3 years ago

Guru 244290 points

At 3.3 V, the fastest logic family is LVC, e.g., SN74LVC125A.

0 RJ over 3 years ago in reply to Clemens Ladisch

TI__Intellectual 2550 points

Clemens,

Could we help to measure the output edge timing when driven by 63MHz clock with 2ns edge for LVC125?

0 Emrys Maier over 3 years ago in reply to RJ

TI__Guru* 96591 points

Hi Ramon,

Can you find out what type of load is being driven, and how the measurements are being performed? I would expect the SN74LV1T125 to have a much better output waveform into a typical 50pF load, but there are some test conditions and some load conditions that might cause changes to the waveform.

0 RJ over 3 years ago in reply to Emrys Maier

TI__Intellectual 2550 points

Emrys,

The clock output is driving a 8pF input pin through two high-speed connectors (rated to 10GHz).

You can see the edge change with and without buffer.

Regards,

0 Clemens Ladisch over 3 years ago in reply to RJ

Guru 244290 points

And what is the capacitance of those connectors, and of the cable between them?

How much does the signal improve with the LVC device?

Logic

Logic forum

SN74LV4T125: max frequency