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SN74HCS596: How we should consider thermal design

Part Number: SN74HCS596

Hello,

I would like to use this device as Vcc=2.5V.

In this case, according to figure 6-1 and 6-2 of datasheet, it seems that high Ron resistance exist.

Therefore, I think that I need to consider Ioh and Iol from viewpoint of thermal.

Then, I found following document about Power consumption and thermal.

https://www.ti.com/lit/an/scaa035b/scaa035b.pdf?ts=1619498975965

https://www.ti.com/lit/an/scza005b/scza005b.pdf?ts=1619499015069

However, it seems that internal Ron resistance value is not applied on these document to calculate thermal.

Could you please tell me advice about how I should consider thermal information ?

Best Regards,

  • The definition of power:  P = I * V

    You don't necessarily have to use resistance to find power consumption, but it is one way to do it.

    Typically the limit for logic devices will not be related to thermal or power issues, but more related to maximum current capability.  This device can only drive 70mA of total current.

    This means that if all 8 outputs are active, you cannot exceed 8.75mA each.

    --

    If you would like my help with power consumption calculations, I would be happy to assist. I need to know details of how the device is being used to help though.

    There is an FAQ that might be helpful here: (+) [FAQ] How do I Calculate Power Consumption or Current Consumption for my CMOS Logic Device? - Logic forum - Logic - TI E2E support forums

  • Hello,

    Thank you for your reply.

    I also checked FAQ, but it seems that this is for push pull type.

    In case of open drain type, there is no high side FET, so is following understanding correct ?

    Ptotal = Ps + PT

    Ps = 2.5V * 4mA
    PT = ((50pF * 2.5^2) / 2) * fi * Nsw

    (Vcc = 2.5V, Io(sink) = 4mA, Cpd = 50pF(this is example))

     Best Regards,

  • The capacitive load power consumption will end up being less for an open-drain device because there's no positive driver at the output.

    In the open-drain case, there are a few changes:

    P_TOTAL = P_S + P_T + P_LC + P_LR

    ^ P_LC is removed because the device is no longer driving a capacitive load.

    P_S = V_CC * I_CC(max) = 2.5V * 2uA = 5 uW

    P_T = C_pd * V_CC^2 * f_I * N_SW = 40pF * 2.5V^2 * 10kHz * 1 = 2.5 uW

    P_LC = 8 * C_L * F_O * V_CC^2 * 1/2 = 8 * 50pF * 10kHz * 2.5V^2 * 1/2 = 12.5 uW

    ^ 1/2 is added because there is no positive driver (half the time the output is not driving the load).

    ^ You may want to add that back in though- because the system still has to provide that power through the external pull-up resistor -- it's just not dissipated in the logic device.

    P_LR = 8 * V_OL * I_OL = 8 * ( 43 ohm * 4 mA ) * 4mA = 5.504 mW

    ^ I pulled output resistance from Figure 6-1 in the datasheet.

    So, total power consumption is 5.5 mW, approximately, for the above calculations. The large load at the output eclipses the other power numbers.