TI E2E support forums
TI E2E support forums
  • User
  • Site
  • Search
  • User
  • E2E™ design support >
  • Forums
    • Amplifiers
    • API solutions
    • Audio
    • Clock & timing
    • Data converters
    • DLP® products
    • Interface
    • Isolation
    • Logic
    • Microcontrollers
    • Motor drivers
    • Power management
    • Processors
    • RF & microwave
    • Sensors
    • Site support
    • Switches & multiplexers
    • Tools
    • Wireless connectivity
    • Archived forums
    • Archived groups
  • Technical articles
  • TI training
    • Tech days
    • Online training
    • Live events
    • Power Supply Design Seminar
  • Getting started
  • 简体中文
  • More
  • Cancel
Logic

Logic

Logic forum

  • Mentions
  • Tags
  • More
  • Cancel
  • Ask a new question
  • Ask a new question
  • Cancel
Texas Instruments (TI) Logic support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search logic IC content or ask technical support questions on everything from voltage level translation and transceivers to standard logic gates and specialty logic devices. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] Can TXG support IEC-ESD for offboard connections

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ TXG devices (both push-pull and open-drain) cannot support any level of IEC-ESD. However, IEC-ESD can still be achieved by using a protection device like the ESDS30x product…
    • 1 month ago
    • Logic
    • Logic forum
  • [FAQ] How far apart can the two systems be with TXG I2C devices?

    Joshua Salinas
    Joshua Salinas
    Other Parts Discussed in Thread: TXG8122-Q1 Since the I2C protocol limits the allowable bus capacitance to 400pF (for Standard and Fast Mode) or 550pF (for Fast Mode+), similar requirements will need to be implemented on the TXG8122-Q1. There are…
    • 1 month ago
    • Logic
    • Logic forum
  • [FAQ] Will TXG QFN packages support wettable flank?

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ At the moment TXG QFN packages do not support wettable flanks. However, we are working towards supporting wettable flank packages once products are fully released. The QFN…
    • 1 month ago
    • Logic
    • Logic forum
  • [FAQ] What is the leakage between 2 grounds?

    Joshua Salinas
    Joshua Salinas
    Other Parts Discussed in Thread: TXG1041 FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ The leakage between two grounds can be found under the Electrical Characteristics section in the datasheet. Using the TXG1041 datasheet…
    • 1 month ago
    • Logic
    • Logic forum
  • [FAQ] Can TXG be used as a simple level translator / buffer?

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ The TXG product family can be used as a regular level translator (VCCA > VCCB or VCCA < VCCB) or in a buffer configuration (VCCA = VCCB). If a user doesn’t need ground shifting…
    • 1 month ago
    • Logic
    • Logic forum
  • [FAQ] What is the maximum trace length ground-level translators can drive?

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ The maximum trace length that ground-level translators (as well as logic devices) can drive is 60 mm. This is a safe trace length for most devices to drive across the majority…
    • 3 months ago
    • Logic
    • Logic forum
  • [FAQ] Is DC ground shifting possible when both supplies are connected together?

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ To use the ground shift capability, voltage supplies need to be separated and fall within the recommended operating conditions. Let’s use the figure above as an example…
    • 3 months ago
    • Logic
    • Logic forum
  • [FAQ] Can I generate a negative PWM signal from a positive PWM signal?

    Joshua Salinas
    Joshua Salinas
    Other Parts Discussed in Thread: TXG8041 FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ A negative signal can be generated from ground-level translators as long as the user’s system has a negative supply rail. To prevent…
    • 3 months ago
    • Logic
    • Logic forum
  • [FAQ] Ground-Level Translators

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > > Current FAQ [FAQ] What are the differences between Ground-Level Translators and Digital Isolators? [FAQ] Can I generate a negative PWM signal from a positive PWM signal? [FAQ] Is DC ground shifting possible…
    • 3 months ago
    • Logic
    • Logic forum
  • [FAQ] What are the differences between Ground-Level Translators and Digital Isolators?

    Joshua Salinas
    Joshua Salinas
    FAQ: Logic and Voltage Translation > Ground-Level Translators >> Current FAQ Ground-Level Translators Digital Isolators GNDA to GNDB Difference 80V 3kVrms Galvanic Barrier No Yes GNDA to GNDB Leakage (VCC to GND…
    • 3 months ago
    • Logic
    • Logic forum
>

View FAQ threads
  • Tags
  • RSS
  • More
  • Cancel
  • Suggested Answer

    CD4047B: ref design for DC to AC 0 Locked

    458 views
    1 reply
    Latest over 5 years ago
    by Dylan Hubbard
  • Suggested Answer

    SN74AUP2G08: SN74AUP2G08 1Y OUTPUT as channel 2 input 0 Locked

    586 views
    1 reply
    Latest over 5 years ago
    by Clemens Ladisch
  • Suggested Answer

    LSF0204D: Pull down on low side signal 0 Locked

    515 views
    3 replies
    Latest over 5 years ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC8T245: END OF LIFE DETAILS 0 Locked

    243 views
    1 reply
    Latest over 5 years ago
    by Dylan Hubbard
  • Suggested Answer

    SN74LVC16T245-EP: END OF LIFE DETAILS 0 Locked

    342 views
    1 reply
    Latest over 5 years ago
    by Dylan Hubbard
  • Suggested Answer

    SMV512K32-SP: Request for suggested footprint/landing pattern of 5962-1123701VXC 0 Locked

    404 views
    1 reply
    Latest over 5 years ago
    by Dylan Hubbard
  • Answered

    SN74LVC1G04: Junction Temperature - Power disipation 0 Locked

    433 views
    2 replies
    Latest over 5 years ago
    by Francisco Gracia Ortego
  • Answered

    SN74LVC1G126: Junction Temperature - Power disipation 0 Locked

    366 views
    2 replies
    Latest over 5 years ago
    by Francisco Gracia Ortego
  • Suggested Answer

    TXS0108E: TXS0108E Current Consumption when VCCA if off 0 Locked

    402 views
    2 replies
    Latest over 5 years ago
    by Abhinav Ranjan
  • Suggested Answer

    SN74LVC244A: ΔIcc spec of SN74LVC244A 0 Locked

    510 views
    1 reply
    Latest over 5 years ago
    by Clemens Ladisch
  • Suggested Answer

    CD4504B: What's the default output level when VCC is not powered and VDD is powered? 0 Locked

    343 views
    1 reply
    Latest over 5 years ago
    by Clemens Ladisch
  • Suggested Answer

    CD74ACT297: PLL circuit implementation 0 Locked

    1416 views
    8 replies
    Latest over 5 years ago
    by Thomas Fripon
  • Suggested Answer

    SN74HC595: All the outputs behave as if they are open-collector/open-drain 0 Locked

    1939 views
    4 replies
    Latest over 5 years ago
    by Jim Davenport
  • Answered

    CD74HC4050: Partial power down 0 Locked

    455 views
    2 replies
    Latest over 5 years ago
    by Mark Guastaferro
  • Suggested Answer

    SN74LV06A: IBIS model 0 Locked

    305 views
    1 reply
    Latest over 5 years ago
    by Chad Crosby
  • Suggested Answer

    CD74HC240: cd 74hc240 LT spice library 0 Locked

    935 views
    3 replies
    Latest over 5 years ago
    by Chad Crosby
  • Answered

    SN74LVC1G125-Q1: input rise/fall time over the spec, will cause output abnormal? 0 Locked

    575 views
    4 replies
    Latest over 5 years ago
    by user3915702
  • Suggested Answer

    SN74LVC1G18: SN74LVC1G18DRYR silk screen 0 Locked

    454 views
    1 reply
    Latest over 5 years ago
    by Dylan Hubbard
  • Answered

    any solution to provide delay for PWM signal? 0 Locked

    1071 views
    3 replies
    Latest over 5 years ago
    by Clemens Ladisch
  • Answered

    TXS0108E: Noise coupling in output signals 0 Locked

    1196 views
    7 replies
    Latest over 5 years ago
    by Clemens Ladisch
<>