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Logic

Logic

Logic forum

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Texas Instruments (TI) Logic support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search logic IC content or ask technical support questions on everything from voltage level translation and transceivers to standard logic gates and specialty logic devices. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] How does a monostable multivibrator (one shot) work?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Monostable Multivibrators >> Current FAQ The above functional block diagram shows generally how a monostable multivibrator (MMV, or one-shot) works. Not all of them have every part shown, but this is the most common…
    • over 5 years ago
    • Logic
    • Logic forum
  • [FAQ] What's the difference between TTL and 5V CMOS logic?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Logic Technology >> Current FAQ It's very common for people to refer to "TTL logic" and to actually mean "5V logic" -- but how are they different? The key difference is in the input and output voltages. This graphic…
    • over 5 years ago
    • Logic
    • Logic forum
  • [FAQ] What is the difference in timing between gates in the same device? How much skew is expected within a given logic device? What is the part-to-part skew?

    Karan Kotadia
    Karan Kotadia
    FAQ: Logic and Voltage Translation > Timing Parameters >> Current FAQ The difference in delay between the individual channels on an individual part is referred to as channel-to-channel skew or output skew. This is typically not covered as a datasheet…
    • over 5 years ago
    • Logic
    • Logic forum
  • [FAQ] What is the difference between the SN74HCxx and the SN74HCxxA?

    Emrys Maier
    Emrys Maier
    Other Parts Discussed in Thread: SN7400 , SN74LS00 FAQ: Logic and Voltage Translation > Logic Technology >> Current FAQ The High-speed CMOS (HC) logic family was created as a direct replacement for older bipolar junction transistor based transistor…
    • over 6 years ago
    • Logic
    • Logic forum
  • [FAQ] What method is best used for estimating specification values between those given in the datasheet?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Input Parameters >> Current FAQ The most common example of this question comes from the fact that Standard Logic devices are specified at 1.65V, 3V, and 4.5V, however most engineers use our devices at 1.8V, 3.3V…
    • over 6 years ago
    • Logic
    • Logic forum
  • [FAQ] When will TI End of Life (EOL) or Obsolete a certain logic device?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Quality and Manufacturing >> Current FAQ TI's General Quality Guideline (page 7) describes our official policy on obsoleting a device. This policy is summarized below. TI's Product withdrawal/discontinuance process…
    • over 6 years ago
    • Logic
    • Logic forum
  • [FAQ] What are the power sequencing requirements for the translation device?

    ShreyasRao
    ShreyasRao
    FAQ: Logic and Voltage Translation > Voltage Translators >> Current FAQ Some of the TI translators have requirements during normal operation mode to have Vcca <= Vccb ( TXS/ TXB01xx) or Vrefb>= VrefA+0.8V(LSF). However, the TI translation devices do…
    • over 6 years ago
    • Logic
    • Logic forum
  • [FAQ] What is the difference between IOFF and VCC isolation? What are the conditions to guarantee it?

    ShreyasRao
    ShreyasRao
    FAQ: Logic and Voltage Translation > Logic Technology >> Current FAQ The I OFF specification guarantees the I/O ports are in high impedance whenever either one of the power supply is at pulled to ground (0V) or close to gnd(<100mV as specified for the…
    • over 6 years ago
    • Logic
    • Logic forum
  • [FAQ] What should be done with unused I/O pins of the level translator devices?

    ShreyasRao
    ShreyasRao
    FAQ: Logic and Voltage Translation > Voltage Translators >> Current FAQ For the TXB family, unused I/O ports are recommended to be tied to GND through a weak pulldown resistors (>=100kohm). For TXS devices, the internal 10kohm pull-ups resistors will…
    • over 6 years ago
    • Logic
    • Logic forum
  • [FAQ] Why is there no PSpice model for a Monostable Multivibrator device?

    Emrys Maier
    Emrys Maier
    Other Parts Discussed in Thread: SN74LVC1G123 FAQ: Logic and Voltage Translation > Monostable Multivibrators >> Current FAQ To make a long post short: MMVs cannot be directly simulated by PSpice because of their direct dependence on external components…
    • over 6 years ago
    • Logic
    • Logic forum
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View FAQ threads
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  • Answered

    SN74LVC1GX04: Connecting crystal to the SN74LVC1GX04 Spice model 0 Locked

    1108 views
    4 replies
    Latest over 4 years ago
    by Danilo A.
  • Answered

    Question Asking 0 Locked

    310 views
    3 replies
    Latest over 4 years ago
    by Jason Ciou
  • Answered

    SN74HC374: https://www.ti.com.cn/product/cn/SN74HC374 0 Locked

    363 views
    2 replies
    Latest over 4 years ago
    by he guixian
  • Suggested Answer

    CD4093B: Part number differences between CD4093BE and CD4093BEE4 and part number difference between CD4093BF and CD4093BF3 0 Locked

    660 views
    1 reply
    Latest over 4 years ago
    by Emrys Maier
  • Suggested Answer

    SN74LV1T125: smaller package device 0 Locked

    247 views
    1 reply
    Latest over 4 years ago
    by Clemens Ladisch
  • Suggested Answer

    TXS02612: Schematic diagram review 0 Locked

    292 views
    1 reply
    Latest over 4 years ago
    by Dylan Hubbard
  • Suggested Answer

    LSF0102: Schematic review 0 Locked

    927 views
    1 reply
    Latest over 4 years ago
    by Dylan Hubbard
  • Answered

    SN74LVC1G11: Schematic review 0 Locked

    381 views
    2 replies
    Latest over 4 years ago
    by Jason Ciou
  • Not Answered

    bidirectional Buffer for NC-SI interface 0 Locked

    357 views
    2 replies
    Latest over 4 years ago
    by Clemens Ladisch
  • Answered

    SN74LVC244A: 8-ch, 1.65-V to 3.6-V buffers with 3-state outputs 0 Locked

    186 views
    1 reply
    Latest over 4 years ago
    by Sebastian Muriel
  • Answered

    SN74LVC2T45: power up sequence 0 Locked

    284 views
    2 replies
    Latest over 4 years ago
    by Ue
  • Suggested Answer

    SN74LVC1G123: K, pulse duration constant is depend on Cext or CL ? 0 Locked

    471 views
    11 replies
    Latest over 4 years ago
    by Emrys Maier
  • Suggested Answer

    SN74AVCH16T245: How much does the signal delay vary from signal pin to signal pin or device to device 0 Locked

    273 views
    1 reply
    Latest over 4 years ago
    by Dylan Hubbard
  • Suggested Answer

    TXU0304: SPI clock speed and I2S data integrity 0 Locked

    275 views
    1 reply
    Latest over 4 years ago
    by Dylan Hubbard
  • Suggested Answer

    SN74LV4T125: Output to 0 Locked

    207 views
    1 reply
    Latest over 4 years ago
    by Dylan Hubbard
  • Suggested Answer

    SN74LVC1G123: Using SN74LVC1G123 to generate pulse duration of 0.1us, 0.2us, 0.5us, 1us, 5us and 10us 0 Locked

    892 views
    7 replies
    Latest over 4 years ago
    by Emrys Maier
  • Answered

    SN74LVC1G175-EP: CLVC1G175MDCKREP Junction Temperature Range 0 Locked

    224 views
    1 reply
    Latest over 4 years ago
    by Emrys Maier
  • Suggested Answer

    SN74LVC1G123: How does Rexr, Cext, RL and CL included in the calculation of pulse duration ? 0 Locked

    408 views
    4 replies
    Latest over 4 years ago
    by Woon Nee Tan
  • Suggested Answer

    SN54LS374: I am having some difficulty with the SN54LS374 Transparent Latches. 0 Locked

    367 views
    3 replies
    Latest over 4 years ago
    by Emrys Maier
  • Suggested Answer

    TXS0108E: Level translation for 1.8V LVCMOS and 3.3V LVCMOS 0 Locked

    1099 views
    1 reply
    Latest over 4 years ago
    by Dylan Hubbard
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