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Logic

Logic

Logic forum

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Texas Instruments (TI) Logic support forum is an extensive online knowledge base where millions of technical questions and solutions are available 24/7. You can search logic IC content or ask technical support questions on everything from voltage level translation and transceivers to standard logic gates and specialty logic devices. Find the right solution for your circuit design challenges by using our TI E2E™ support forums that are supported by thousands of contributing TI experts.
Frequent questions
  • [FAQ] Why is there a voltage offset at the input of the SN74AXCxTxxx device?

    Dylan Hubbard
    Dylan Hubbard
    FAQ: Logic and Voltage Translation > Voltage Translators >> Current FAQ The AXC family of Voltage Translators have built in dynamic pull-downs at the I/O. These pull-downs assist with with the glitch free power sequencing feature included in this…
    • over 3 years ago
    • Logic
    • Logic forum
  • [FAQ] Do I still need pull-up/pull-down resistors with bus-hold circuitry?

    Albert Xu1
    Albert Xu1
    FAQ: Logic and Voltage Translation > Input Parameters >> Current FAQ Short answer: External pull-up/down resistors are not recommended for devices with bus-hold circuitry. Explanation: A pull-up or pull-down resistor will create a voltage-divider…
    • over 3 years ago
    • Logic
    • Logic forum
  • [FAQ] Why are the TXS01xx VIH/VIL specifications so stringent?

    Dylan Hubbard
    Dylan Hubbard
    FAQ: Logic and Voltage Translation > Voltage Translators >> Current FAQ TXS family translators utilize a FET-based architecture with an N-channel pass-gate transistor used to open and close the connection between the A-port and B-port. The FET connects…
    • over 3 years ago
    • Logic
    • Logic forum
  • [FAQ] [H] Frequently Asked Questions: Logic and Voltage Translation

    Michael J Schultis
    Michael J Schultis
    Select this link to see answers to common questions, detailed use case implementations, and part recommendations for logic and voltage translation devices. . Top Logic and Voltage Translation FAQs - All-Time How does a slow or floating input affect…
    • Answered
    • over 3 years ago
    • Logic
    • Logic forum
  • [FAQ] What is the typical delay of a logic device in a particular logic family?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Timing Parameters >> Current FAQ Delays vary from device to device, however a general idea of delay can be shown graphically: Two things to note from the above graphic (1) Delay always increases as the supply…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] Where can I get a CAD symbol, soldering footprint, or 3D model for my device?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Quality and Manufacturing >> Current FAQ TI utilizes the Ultra Librarian software to provide symbols, footprints, and 3D models for our devices. In the product folder for your selected device, scroll down and select…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] How do I set up a TI.com device re-stock notification?

    Sebastian Muriel
    Sebastian Muriel
    FAQ: Logic and Voltage Translation > Quality and Manufacturing >> Current FAQ 1. Search for the desired device in the TI store . 2. Click on the device and select the Ordering & Quality link. 3. Select the Notify me when available link. 4…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] What are the performance specifications of the HCS logic family at 3.3V operation?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Input Parameters >> Current FAQ This question comes up fairly often because the HCS logic family is specified only at 2V, 4.5V, and 6V. The following min / max values are interpolated from the datasheet tables…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] How do I select a bypass capacitor for a CMOS logic device?

    Emrys Maier
    Emrys Maier
    Other Parts Discussed in Thread: SN74LVC1G08 , SN74LVC16244A FAQ: Logic and Voltage Translation > Power and Thermals >> Current FAQ For the short answer - use a 0.1uF for single supply logic devices like the SN74LVC1G08, or a 0.022uF capacitor for each…
    • over 4 years ago
    • Logic
    • Logic forum
  • [FAQ] What's the difference between logic output types (push-pull, open-drain, 3-state)?

    Emrys Maier
    Emrys Maier
    FAQ: Logic and Voltage Translation > Output Parameters >> Current FAQ Push-Pull Output A push-pull output can source current in the high state or sink current in the low state. In modern CMOS devices, the most common configuration for a push-pull…
    • over 4 years ago
    • Logic
    • Logic forum
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  • Answered

    CD4046B: Use PLL CD4046B and frequency divider CD4040B to design a 60Hz frequency tracker 0 Locked

    7460 views
    10 replies
    Latest over 5 years ago
    by SK
  • Suggested Answer

    SN74LVC1G175: schematic 0 Locked

    701 views
    2 replies
    Latest over 5 years ago
    by Clemens Ladisch
  • Answered

    TXS0102-Q1: Please confirm output behavior for VIL range 0.15V to Vcc-0.4V 0 Locked

    437 views
    4 replies
    Latest over 5 years ago
    by Clemens Ladisch
  • Suggested Answer

    SN74LVC1G123: Output Q behavior 0 Locked

    1318 views
    7 replies
    Latest over 5 years ago
    by Chad Crosby
  • Suggested Answer

    SN74LVC1G07: The design of SN74LVC1G07 will causing latch-up? 0 Locked

    1078 views
    1 reply
    Latest over 5 years ago
    by Chad Crosby
  • Suggested Answer

    Please provide the Gates quantity for list. 0 Locked

    255 views
    1 reply
    Latest over 5 years ago
    by Dylan Hubbard
  • Suggested Answer

    SN74LVC2T45: To evaluate I would like the board layers to the Generic 5-8-LOGIC-EVM. 0 Locked

    663 views
    1 reply
    Latest over 5 years ago
    by Dylan Hubbard
  • Answered

    SN74ABT244A-EP: Thermal information 0 Locked

    354 views
    2 replies
    Latest over 5 years ago
    by Cedrick
  • Answered

    SN74LV541AT: About Thermal Pad 0 Locked

    460 views
    7 replies
    Latest over 5 years ago
    by Hide
  • Answered

    SN74LV4046A: How does PCout act when the Vcxo controlled by this IC and the Vcxo making the reference clock are the same? 0 Locked

    289 views
    4 replies
    Latest over 5 years ago
    by Taku Kato
  • Answered

    CD74AC14: CD74AC14 0 Locked

    467 views
    4 replies
    Latest over 5 years ago
    by Varunesh Kumar
  • Answered

    SN74AXC4T245: Not using Channel 1 0 Locked

    233 views
    1 reply
    Latest over 5 years ago
    by Clemens Ladisch
  • Answered

    SN74ALVCH32973: Drop in Alternative 0 Locked

    539 views
    1 reply
    Latest over 5 years ago
    by Chad Crosby
  • Answered

    Leadframe material - by package or family? 0 Locked

    1293 views
    3 replies
    Latest over 5 years ago
    by LeonardEllis
  • Suggested Answer

    SN74HCS72-Q1: Request for TINA-TI model 0 Locked

    872 views
    4 replies
    Latest over 5 years ago
    by Chad Crosby
  • Not Answered

    fixing simulation 0 Locked

    188 views
    2 replies
    Latest over 5 years ago
    by Chad Crosby
  • Suggested Answer

    SN74LVC1T45: Power up glitch on output 0 Locked

    384 views
    4 replies
    Latest over 5 years ago
    by Dylan Hubbard
  • Answered

    LSF0108: clarify pull-up requirement for low (A) side in DOWN translation 0 Locked

    319 views
    4 replies
    Latest over 5 years ago
    by Clemens Ladisch
  • Answered

    CD40109B: CD40109B 0 Locked

    417 views
    3 replies
    Latest over 5 years ago
    by Clemens Ladisch
  • Answered

    TIBPAL16R6-12M: TIBPAL16R6-12M 0 Locked

    251 views
    5 replies
    Latest over 5 years ago
    by Chris Flippen
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