TXS0104E: TXS0104E I2C Voltage Level issue

Hey GB,

Your picture didnt come through. I will also need to see the schematic to see all the connections.

Hi, Dylan.

Sorry. I don't know that the picture is error.

So, I upload the picture again and our schematics.

Looking for your reply. Thank you in advance.

The TXS has internal pull-up resistors; you should be able to remove the external ones.

The TXS is a passive switch (its edge accelerators are active only for a few nanoseconds), so either the FPGA or the ADC drives the line low. Measure the voltage drop over the TXS (pins 3 and 12) to find out in which direction the current flows.

Hi Dylan,

Thank you for your reply.

As you tell me, I Measured TXS(Pin3 and 12). The result is same the below pictures.

Because Pin 3 is 2.2V and Pin 12 is 1.4V , I think current flows to LTC2493. 

If it is right, What should i do next? 

Looking for your reply. Thank you in advance.

With a switch resistance of about 250 Ω, this is a current of about 3 mA. This is ten times the current that would flow through the TXS's internal 10 kΩ pull-up.

Apparently, the FPGA actively pulls the line high (which is not allowed with I²C), or there is some other pull-up resistor or device. Are you sure that the FPGA's output is configured correctly as open drain, and that there is nothing else connected to AD_TMP_SDA?

AD_TMP_SDA don't connected except TXS.

But, FPGA's output is not open drain. Our FPGA's Output is Push-Pull.

I²C must always use open-drain drivers. (The only exception is the clock signal, and only if all slaves are guaranteed to never use clock stretching.)