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RM46L852: RM46L : How to know when eqep index event occurs

user6428223
Prodigy 140 points
Part Number: RM46L852

Hello,

I had to know when eqep index event occurs for some application we are newly developing.

Currently, QEPCTL[PCRM]  is set 0 : Position counter reset on an index event. Our developed system is working  well.

Monitoring QEPSTS[FMFL] : First index marker flag or QFLG[IEL]: Index event latch interrupt flag could be functional

for the purpose, I thought. But unfortunately, both was not.

Does someone have any solution ?

Thanks in advance.

Yamai

  • 0
    TI__Guru**** 192486 points

    Hi Yamai,

    You use this interrupt, you need to enable VIM to send interrupt request of eQEP (channel 110) to CPU:

    There are three "gates" before an interrupt request gets to the CPU:

    1. The module that generates an interrupt request has a register to enable each interrupt that it can generate.
    2. The Vectored Interrupt Manager (VIM) has registers to allow an interrupt request from a module to be forwarded to the CPU as per the priority scheme (lower channel number first).
    3. Finally the CPU itself must be configured to respond to the interrupt requests forwarded by the VIM (IRQ or FIQ).
  • 0 in reply to QJ Wang
    Prodigy 140 points

    Hello Wang-san,

    Thanks a lots.

    I have already used following 2 interrupts of eqep.

    1. Unit time out interrupt (QFLG: bit 11)   2. eQEP compare match event interrupt (QFLG: bit 8)

    I have to detect index event with interrupt , don't I ?

    When QEPCTL[PCRM]  is set 0 and QEINT[IEL] is set 1, interrupt  should work ?

    I will check it out tomorrow.

    I am happy if there is a measure to know index event without interrupt.

    But I think, index even interrupt could be disabled when it is not necessary.

    Best regards,

    Yamai

  • 0 in reply to user6428223
    Prodigy 140 points

    Hi Wang-san,

    It worked, thanks, I will use interrupt to know index event.

    Best regards,

    Yamai