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TM4C123GH6PM: Emulating PS/2 Keyboard send data with TM4C123GH6PM

Part Number: TM4C123GH6PM

Hello,

I wanted to use the tm4c123gh6pm to send ps/2 keyboard commands. The ps2dev library accomplishes ps2 writes by:

int PS2dev::write(unsigned char data) {
  
  delayMicroseconds(BYTEWAIT);

  unsigned char i;
  unsigned char parity = 1;

  if(digitalRead(_ps2clk) == LOW) {
    return -1;
  }

  if(digitalRead(_ps2data) == LOW) {
    return -2;
  }

  golo(_ps2data);
  delayMicroseconds(CLKHALF);
  
  // device sends on falling clock
  golo(_ps2clk);	// start bit
  delayMicroseconds(CLKFULL);
  
  gohi(_ps2clk);
  delayMicroseconds(CLKHALF);

  for(i=0; i<8; i++) {
    
      if(data & 0x01) {
        gohi(_ps2data);
      } else {
        golo(_ps2data);
      }
      
      delayMicroseconds(CLKHALF);
      golo(_ps2clk);
      
      delayMicroseconds(CLKFULL);
      gohi(_ps2clk);
      
      delayMicroseconds(CLKHALF);
      parity = parity ^ (data & 0x01);
      data = data >> 1;
  }
  
  // parity bit
  if(parity) {
    gohi(_ps2data);
  } else {
    golo(_ps2data);
  }
  delayMicroseconds(CLKHALF);
  golo(_ps2clk);
  delayMicroseconds(CLKFULL);
  gohi(_ps2clk);
  delayMicroseconds(CLKHALF);

  // stop bit
  gohi(_ps2data);
  delayMicroseconds(CLKHALF);
  golo(_ps2clk);
  delayMicroseconds(CLKFULL);
  gohi(_ps2clk);
  delayMicroseconds(CLKHALF);

  delayMicroseconds(BYTEWAIT);

  return 0;
}

However, this is a blocking approach. Is there any way I can accomplish this? How slow can I clock spi? basically I need to generate serial data with clock, Can I clock the ssi peripheal as low as 10-16.7 kHz?

  •  but

    I need to generate clocked data, with start, stop and parity bits, at around 12khz, as above. I was able to clock ssi1 down to 12khz, and generate similar pattern but not exactly same.

    The captured ps2 pattern above, the data bits start half a clock cycle before, and end half a clock cycle after the clock changes level.

    Is there no other ways of generating clocked data without using delays?

    Best Regards,

    C.

  • Hi Can,

      I'm not familiar with PS/2 protocol requirement. Is the above timing a requirement by PS/2 keyboard? Why does the data need to come out at 1/4 of cycle after rising edge? You need to check the A/C timing (setup and hold time between data and the sampling clock edge) on the datasheet for the PS/2 keyboard. Both TM4C and PS/2 must be configured for the same phase and polarity. If TM4C is sending data on the rising edge of clock then the PS/2 will sample the data on its falling edge. It should give plenty of setup time for the data by the receiving data. Delaying the data by 1/4 of clock cycle actually reduces the setup time. 

      If you must add delay I will suggest you consider adding the delay on your board. There is no way to create 1/4 cycle delay on the SSI unless you bit-bang these signals.