AM2432: EtherCAT master implementation

Hi
Sorry for the late response.

We don’t have examples or demos for R5F/A53 based EtherCAT master in our SDK.

TI does not offer EtherCAT master stack, but there are commercial stacks like https://www.acontis.com/en/ethercat-master.html which can run on Sitara MCUs. The compute needs and achievable performance will depend on the application. An 800MHz R5F might be enough for some applications but often EtherCAT masters use higher end devices.


Regards
Dhaval Khandla

Dhaval Khandla said:

We don’t have examples or demos for R5F/A53 based EtherCAT master in our SDK.

TI does not offer EtherCAT master stack, but there are commercial stacks like https://

Slight clarification. The EtherCAT demos we have, such as https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/08_02_00_31/exports/docs/industrial_protocol_docs/am64x/ethercat_slave/plc_codesys_am64x.html is the user guide https://dev.ti.com/tirex/explore/node?node=AJipVMXfVvuEkO-U7l2wDg__6zyEKJF__LATEST is the MCU+ Academy module, use A53 and Linux AM64x and 3rd party software (Codesys). These demos include instructions how to install the evaluation version of Codesys EtherCAT master on Sitara AM64x. 

  Pekka

As your colleagues already explained it really depends on the application whether a device like the AM24x is sufficient for an EtherCAT master.

Our own EtherCAT master (https://www.ibv-augsburg.de/icnet/ethercat-master/) runs on the R5f core of an AM64x. There's no reason why this shouldn't run on a AM2x, too.

With a small network we're able to achieve 100us cycle time on that hardware.

You basically just need a 100 Mbit/s Ethernet port to run an EtherCAT master. We currently support the ICSSG in Dual-Mac mode, but support for CPSW is planned, and shouldn't be that different.

Regards,

Dominic