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Hi experts,
We are having trouble executing PBIST-Tests on our hardware.
We are currently facing 2 problems. The first is, that we readback register immediatly after writing them (As suggested by the Safety Manual), which works well most of the time.
Except in this case. Sometimes when writing and reading back the PBIST or the RTI registers the written value differs from the read value.
Our second Problem is, that after a successfull run, when exiting the function a Prefetch Abort is triggered.
I read the guide for debugging aborts: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1029488/faq-tms570lc4357-troubleshooting-the-abort-exceptions-on-hercules-devices/3805820?tisearch=e2e-sitesearch&keymatch=TMS570LC4357%20TCM#3805820
And also cheked the following:
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/998791/tms570lc4357-tms570lc4357-application-ram-error-always-occurs-after-running-pbist-l2ram-test-sourced-from-safeti-library?tisearch=e2e-sitesearch&keymatch=TMS570LC4357%252525252520PBIST#
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1058363/tms570lc4357-pbist-self-check/3995396?tisearch=e2e-sitesearch&keymatch=TMS570LC4357%20PBIST#3995396
But as far as I can tell usualy either the PBIST fails or a data abort is triggered. For some reason our debugger does not allow us to check the registers for debugging an abort.
(Q2) So, can PBIST corrupt a prefetched Instruction when run, although cache is deactiviated on start up, if that is not the case, what could be the problem?
Thank you and best regards,
Max
Q1) How can we make sure, that the register are readback wenn the write operation has finnished and not before?
If the MPU region 16 (0xFFF80000~0xFFFFFFFF) is configured as strongly-ordered mode, the read operation is issued after write operation completes.
(Q2) So, can PBIST corrupt a prefetched Instruction when run, although cache is deactiviated on start up, if that is not the case, what could be the problem?
We never noticed this issue. I am not sure if the PBIST can corrupt the prefetched instructions.
Hi QJ,
Do you have any suggestion what could trigger the Prefetch Abort after PBIST?