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TMS570LC4357: TMS570LC4357: Execution of PBIST on single port memory triggers Prefetch Abort 2

Part Number: TMS570LC4357

Hi experts,

Since this thread is locked: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1110910/tms570lc4357-execution-of-pbist-on-single-port-memory-triggers-prefetch-abort

We are still getting a prefetch abort as described in the prvious post.
(Q1) Do you have any suggestions how we can debug this or what could something like this?

Thank you and best regards,
Max

  • Hi Max,

    Prefetch Abort (PABT) Exception occurs when an instruction fetch causes an error. When a Prefetch Abort occurs, the processor marks the prefetched instruction as invalid, but does not take the exception until the instruction is to be executed.

    The reason for Prefetch Abort can be analyzed by reading the Instruction Fault Status Register (IFSR), the Instruction Fault Address Register (IFAR), and the Auxiliary Instruction Fault Status Register (AIFSR). 

    IFAR contains the address where the CPU was trying to fetch an instruction from. The contents of IFAR is always valid for a Prefetch Abort, because all Prefetch Aborts are synchronous.

  • Is the PBIST test performed during start-up or run-time?

    PBIST test is a destructive test where the SRAM or cache will be subject to the test vectors. Your application data or instructions in SRAM and cache will be lost due to the test. 

    Can you perform SRAM PBIST before enabling the cache?

  • Hi QJ,

    we are not using the cache. But it looks like the loss of the stack seems to be the problem. We are currently trying to trigger a cpu reset after PBIST has finnished, if that does not work we would have to implemnt the test in assembler, to run it early during startup.

  • Hi Max,

    Is the prefetch during PBIST solved?

  • Hi QJ,

    We implemented PBIST by avoiding any functions while polling the MSTDONE and RTI counter bits during PBIST run. Immediatly after the test is done we trigger a CPU reset. This way stack is reinitialized and we avoid a prefetch abort when returning from the PBIST-Function.

    It looks like it works, but is not fully tested yet.