TMS570LS3137: EMIF Interface to asynchronous memory DS1747W-120IND+

VEERAPPAN P

Intellectual 420 points

Part Number: TMS570LS3137
Other Parts Discussed in Thread: TMDS570LS31HDK, HALCOGEN

Hi,

I am using TMDS570LS31HDK Hercules TMS570LS31x/21x Development Kit.

I want to interface external RTC NVMRAM DS1747W-120IND+ to this Development Kit and this configuration are used.

Halcogen Configuration

Enabled EMIF Driver in Driver tap
VCLK3 is 40MHz
Pinmux tab checked EMIF and in special pinmux option checked EMIF_CLK output.
In EMIF tab

EMIF general tap checked EMIF async1

EMIF Async1 tap WSETUP =15 Cycle

WSTROBE =63 Cycle

WHOLD =0 Cycle

RSETUP =15 Cycle

RSTROBE =63 Cycle

RHOLD =0 Cycle

TA = 3 Cycle

ASIZE = 8bit.

Connections I used

DS1747W-120IND+ Pin diagram

The Problem is While writing one byte of data in 0x60000000 location the next locations 0x60000001, 0x60000002, 0x60000003, 0x60000004 data also writted and I can't read or write the RTC data.

Before one byte data write

After one byte data write

This is the code I used

Thanks for yours help.

over 2 years ago

0 jagadish gundavarapu over 2 years ago

TI__Guru 70241 points

Hi Veerappan,

If you are sure that EMIF CLOCK is 40Mhz then Can you, please change the characteristics in HALCoGen as below and try?

EMIF Async1 tap WSETUP = 4 Cycle

WSTROBE =3 Cycle

WHOLD =0 Cycle

RSETUP =0 Cycle

RSTROBE =4 Cycle

RHOLD =1 Cycle

TA = 0 Cycle

ASIZE = 8bit.

Thanks & regards,
Jagadish.

0 VEERAPPAN P over 2 years ago in reply to jagadish gundavarapu

Intellectual 420 points

Hi jagadish gundavarapu,

I tried this configuration same result as I mentioned above.

0 jagadish gundavarapu over 2 years ago in reply to VEERAPPAN P

TI__Guru 70241 points

Hi Veerappan,

Do you have any logic analyzer?

If you have a logic analyzer then we can probe few data lines and clock lines, so that we can see whether the controller is really sending the 5 bytes or is it RTC behaving malfunction.

Thanks & regards,
Jagadish.

0 VEERAPPAN P over 2 years ago in reply to jagadish gundavarapu

Intellectual 420 points

Hi jagadish gundavarapu,

While monitoring the Chip enable and Write Enable pins of TMDS570LS31HDK using Digital storage Oscilloscope, While I writing Single byte of data in

0x60000000 location Write enable signal is goes down five times.

0x60000001 location Write enable signal is goes down four times.

0x60000002 location Write enable signal is goes down three times.

0x60000003 location Write enable signal is goes down two times.

0x60000004 location Write enable signal is goes down three times.

But while Reading a single byte, read enable(nOE) goes only one time for every read operation is performed.

0 jagadish gundavarapu over 2 years ago in reply to VEERAPPAN P

TI__Guru 70241 points

Hi Veerappan,

I found one of the similar issue in old threads,

Here they solved issue by configuring memory type as "STRONGLYORDERED'

(+) EMIF- Multiple pulses in write enable with single 16 bit data transfer - Arm-based microcontrollers - INTERNAL forum - Arm-based microcontrollers - INTERNAL - TI E2E support forums

Can you please change it to STRONGLYORDER and test it again?

--
Thanks & regards,
Jagadish.

0 VEERAPPAN P over 2 years ago in reply to jagadish gundavarapu

Intellectual 420 points

Hi jagadish gundavarapu,

Above link is page not found error.

I tried the configuration above image still multiple write is present when single write is performed.

0 jagadish gundavarapu over 2 years ago in reply to VEERAPPAN P

TI__Guru 70241 points

Hi Veerappan,

Here is the thread i am mentioned.

EMIF_Issue.pdf

VEERAPPAN P said:
I tried the configuration above image still multiple write is present when single write is performed.

Did you configured and checked for right address range?

Thanks & regards,
Jagadish.

0 VEERAPPAN P over 2 years ago in reply to jagadish gundavarapu

Intellectual 420 points

Still Multiple Write enable pulse is present.

0 jagadish gundavarapu over 2 years ago in reply to VEERAPPAN P

TI__Guru 70241 points

Hi Veerappan,

I will discuss with internal team once on this to find out whether there is any other root cause for this issue? I will try to provide the response as soon as possible.

Thanks & regards,
Jagadish.