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Hello,
Our HW comprises a USB to UART bridge (FT234XD). We'd like to connect the bridge's UART output to the MSP432411Y's UART1 port and perform app updating via the bridge. Clearly, a custom bootloader using UARt1 will need to be programmed in flash. Aside from this, how feasible and easy to achieve is this scheme?
Regards, Magda
Hi,
I will suggest you first try out the flash-based serial UART bootloader example at C:\ti\simplelink_msp432e4_sdk_4_20_00_12\examples\nortos\MSP_EXP432E401Y\boot_loader\boot_serial_uart_flash. This example uses UART0. However, in the bl_config.h file you can specify other UART instances such as UART1 as the port for bootloading. You will need to change the macros defined in bl_config.h from UART0 to UART1. See below used for UART0.
//***************************************************************************** // // Selects the baud rate to be used for the UART. // // Depends on: UART_ENABLE_UPDATE, CRYSTAL_FREQ // Exclusive of: UART_AUTOBAUD // Requires: None // //***************************************************************************** #define UART_FIXED_BAUDRATE 115200 //***************************************************************************** // // Selects the clock enable for the UART peripheral module // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UARTx // //***************************************************************************** #define UART_CLOCK_ENABLE SYSCTL_RCGCUART_R0 //***************************************************************************** // // Selects the base address of the UART peripheral module // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_CLOCK_ENABLE // //***************************************************************************** #define UARTx UART0 //***************************************************************************** // // Selects the clock enable for the GPIO corresponding to UART RX pin // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_RXPIN_BASE, UART_RXPIN_PCTL and UART_RXPIN_POS // //***************************************************************************** #define UART_RXPIN_CLOCK_ENABLE SYSCTL_RCGCGPIO_R0 //***************************************************************************** // // Selects the base address for the GPIO corresponding to UART RX pin // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_RXPIN_CLOCK_ENABLE, UART_RXPIN_PCTL and UART_RXPIN_POS // //***************************************************************************** #define UART_RXPIN_BASE GPIOA //***************************************************************************** // // Selects the port control value for the GPIO corresponding to UART RX pin // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_RXPIN_CLOCK_ENABLE, UART_RXPIN_BASE and UART_RXPIN_POS // //***************************************************************************** #define UART_RXPIN_PCTL 0x1 //***************************************************************************** // // Selects the pin number for the GPIO corresponding to UART RX pin // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_RXPIN_CLOCK_ENABLE, UART_RXPIN_BASE and UART_RXPIN_PCTL // //***************************************************************************** #define UART_RXPIN_POS 0 //***************************************************************************** // // Selects the clock enable for the GPIO corresponding to UART TX pin // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_TXPIN_BASE, UART_TXPIN_PCTL and UART_TXPIN_POS // //***************************************************************************** #define UART_TXPIN_CLOCK_ENABLE SYSCTL_RCGCGPIO_R0 //***************************************************************************** // // Selects the base address for the GPIO corresponding to UART TX pin // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_TXPIN_CLOCK_ENABLE, UART_TXPIN_PCTL and UART_TXPIN_POS // //***************************************************************************** #define UART_TXPIN_BASE GPIOA //***************************************************************************** // // Selects the port control value for the GPIO corresponding to UART TX pin // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_TXPIN_CLOCK_ENABLE, UART_TXPIN_BASE and UART_TXPIN_POS // //***************************************************************************** #define UART_TXPIN_PCTL 0x1 //***************************************************************************** // // Selects the pin number for the GPIO corresponding to UART TX pin // // Depends on: UART_ENABLE_UPDATE // Exclusive of: None // Requires: UART_TXPIN_CLOCK_ENABLE, UART_TXPIN_BASE and UART_TXPIN_PCTL // //***************************************************************************** #define UART_TXPIN_POS 1