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TMS570LC4357: VCLKACON1 109h

Part Number: TMS570LC4357
Other Parts Discussed in Thread: HALCOGEN,

Hello,

In spnu563a.pdf document, I found information that reserved bits 15-0 in VCLKACON1 should return 0x0109 value. After register reading, I fund value 0x0009. Is this just a bug in documentation or should I expect different register values depending on silicon revision? Or maybe under some other conditions? I'm asking about it as currently, I'm working on a project which requires register validation using read.

Thank you for help,

Regards,

Sebastian Sokołowski

  • Hi Sebastian,

    It is 0x109. But it doesn't matter because this async peripheral clock is not used in this device. 

    should I expect different register values depending on silicon revision?

    Both RevA and RevB return 0x109. 

  • Thank you for the information. I assumed that this field is not possible to be modified but it seems that write operation and value change is accepted. The code which was changing this value was generated by HALCOGEN.

    Regards,
    Sebastian Sokołowski

  • In several Hercules devices, for example RM48L852, the VCLKA3 is used to clock USB modules (host and device). The bits 15-0 in VCLKACON1 configures the VCLKA3. The bit 11-8 is the clock divider, bit 3-0 defines the VCLKA3 clock source (9 indicates VCLK)

    0x109 --> VCLKA3 = VCLK/2

    0x009 -> VCLKA3 = VCLK/1

    The TMS570LC4357 doesn't support USB host and device, and the VCLKA3 is not implemented. Writing value to bit[15:0] of VCLKACON1 doesn't matter at all.