• State TI Thinks Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 30 subscribers
  • Views 110 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM2634-Q1: CCM/ECC/PBIST module functional description and .vector section protection

Will Gao
Intellectual 2335 points
Part Number: AM2634-Q1

Hi BU, 

Two questions need your help: 

1. Could you share more detailed functional description for CCM/ECC/PBIST module? Their operation flow are not descripted or not clear so that for application when we meet problem during debugging the SDL, we do not know what is the behavior/status for the hardware. 

2. The vector is always located at TCMA, but MPU does not provide protection for this part. How can the application set protection for the .vector section? Only via software check? 

Regards, 

Will 

  • 0
    TI__Mastermind 19355 points

    Hi Will,

    CCM details are given in the TRM.

    PBIST details are given in the safety manual. On PBIST, we are writing in to PBIST register space on which memory need to be tested with which algorithm. Once the test is complete, there will be an interrupt and then FSRF register is checked weather the test is completed without errors.

    On ECC, after the error is detected, you should first monitor the status register in the ECC Aggregator space(SEC_STATUS_REG0 and DED_STATUS_REG0). These will give the information on which RAM ID triggered the error. 

    Regards,
    Vishwanath Reddy.

  • 0 in reply to Vishwanath Reddy
    TI__Intellectual 2335 points

    Hi Vishwa, 

    Thanks for your inputs. But it is still not very clear. Anyway, you can close this thread. I will try to convince the customer about this issue.