• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 30 subscribers
  • Views 328 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM48L952: PGE (TQFP 144) vs ZWT(BGA) VCLKA4 DIVIDER DIFFERENCE

Luca Meloni
Intellectual 470 points
Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Hi everyone. I'm making a project with halcogen (latest version). I noticed that in the gui if I use the bga model of the chip the VCLA4_divider window is present, while if I use the tqfp model of the same chip, this window to set the divider is not present. Is this a halcogen problem, or are the 2 chip models different?

https://drive.google.com/file/d/1murrnygikyrNOdL6TDbFRbZAAcKws2cs/view?usp=drive_link

https://drive.google.com/file/d/1mWD-Bv4P6_6_6z2h2GbZ1eDj-kyPhS_V/view?usp=drive_link

  • +1
    TI__Guru 70931 points

    Hi Luca,

    Many thanks for pointing out this issue and i agree with you that it is a HALCoGen bug.

    I will raise this bug for future rectification.

    My workaround is:

    As you can see VCLKA4 divider is located in VCLKACON1 register at bit 24 to 26.

    And this is located in "mapClocks" function of HALCoGen generated code.

    Here you can see 8-1 value is writing, when i select the divider as 8 in the HALCoGen:

    So similarly, just manually write the required VCLKA4 divider in corresponding instruction.

    --

    Thanks & regards,
    Jagadish.