Other Parts Discussed in Thread: HALCOGEN,
Hi TI Team,
I would like to report a potential issue with HalCoGen generated code for CPU self-test on TMS570LS0914.
When using HalCoGen to generate the CPU self-test code, the test was always failing on my board with failure register = 0x03.
I noticed that the STC interval generated by HalCoGen is 26 in sys_selftest.h. But in the reference manual, it is indicated that the total interval supported is 24.
Updating the value of STC_INTERVAL from 26 to 24, makes the CPU self-test successful on my board.
Could you confirm that this is a bug on HalCoGen?
Maybe this post can help someone with the same issue.
Best regards,
Elieva