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TMS570LS1114: How to test external Watchdog Reset

Part Number: TMS570LS1114

Hello,

in our application we use the TMS570LS1114 together with the Infineon TLF35584, that combines voltage supply and monitoring as well as watchdog functions as a system basis chip or PMIC. The TLF35584 has one Reset Output (called ROT), that is driven low in case of invalid MCU voltages or in case of watchdog failures, so it has to be connected to pin nPORRST of TMS570LS1114.

The same situation should be even with the TI TPS65381A, because this device also combines under-volatge reset and watchdog reset via its pin NRES, so it also has to be connected to nPORRST.

Both devices can not be connected to the warm reset input nRST of TMS570LS1114.

To detect latent faults in the watchdog circuit we have to test the watchdog at power-up. Is there any suggested way to store the information, that the watchdog test is performed, and to keep this information during the external activated power-on-reset via the nPORRST pin? SYSESR:PORST does not allow to detect the difference. It seems that RAM, even in Power Domain PD1, cannot be used to sustain information during PORRST, because it has to be initialized after reset to satisfy the ECC.

So how to do?

Thanks

Christian