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Hi Sir/Madam,
I'm using AM2431BSDFHIALVR micro-controller for my application. This is the first time I'm using Ti micro-controller. can you please guide me what are the changes made in the gel file to debug through the CCS. Can I use Blackhawk XDS560V2-USB system trace emulator for my micro-controller?
Thanks and Regards,
Kathir
Hello Kathir,
Are you using a custom board or a TI EVM?
The AM2431 is compatible with the XDS560V20-USB but you need the proper header on the board for the JTAG and trace signal connections.
For additional information on the JTAG Connectors and pinout refer to:
For additional information on the XDS560, refer to:
Please let me know if you have any additional questions.
Regards,
Erik
Hi Erik,
Thanks for the reply. I'm using the custom board. There is proper header on the board for the JTAG.
Do I need to make any changes in the gel file for debugging through CCS for Blackhawk XDS560V2-USB system trace emulator.
or flashing the SOC initialization binary to the custom board is enough for debugging through ccs ?
Hello Kathir,
Please refer to the steps listed in the SDK getting started documentation: https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/09_01_00_41/exports/docs/api_guide_am243x/CCS_SETUP_PAGE.html#CCS_NEW_TARGET_CONFIG
The only change that you will need to make for the XDS560V2 is selecting the connection type to be "Blackhawk XDS560v2-USB System Trace Emulator" when setting up the target configuration.
Also, ensure that you have checked the Blackhawk debug probe installation when downloading Code Composer Studio. Otherwise, only Spectrum Digital and TI emulators will populate in the Target Configruation Connection field.
Regards,
Erik
Hi Erik,
Thanks for the reply.
we followed the steps you mentioned in the post earlier.
Error connecting to the target:
(Error -1170 @ 0x0)
Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK).
(Emulation package 9.13.0.00201)
Also ,Does" Test Connection " test indicates any HW issue. OR can i say that if this test passes then there is no issue with HW?
PS: Since this is a custom board we don't have an UART boot option .Only thing we has is JTAG ,QSPI, and SD card option. We tried to do this "EVM_SETUP_PAGE.html" but Since there is no UART BOOT option available I am not able to procced
regards,
Kathir
Hi Erik,
In addition to the previous thing, I want to add the below observation
We Initialized the SOC using CCS scripting using the following command in console script:
loadJSFile "C:/ti/mcu_plus_sdk_{soc}_{sdk version}/tools/ccs_load/am243x/load_dmsc_hsfs.js"
we received the following message:
Connecting to MCU Cortex_R5_0! Writing While(1) for R5F Running the board configuration initialization from R5! Happy Debugging
But we weren't able to connect to the M4 core target in our board.
Regards,
Kathir
Hello Kathir,
Can you confirm if your device is the SR2.0 AM243x?
Also, can you try connecting SoC device power before connecting the XDS560 and see if the Unable to connect to DAP error message persists?
With an HS-FS device, it is expected that you would not be able to connect to the M3 core. For more information on HS-FS devices, please refer to: https://software-dl.ti.com/mcu-plus-sdk/esd/AM243X/09_01_00_41/exports/docs/api_guide_am243x/HSFS_MIGRATION_GUIDE.html
That page also includes additional details on the application boot + ccs gels with an HS-FS device.
Regards,
Erik
Hi Erik,
Your quick response is highly appreciated !!
Can you confirm if your device is the SR2.0 AM243x?
KP: Its SR2.0 (Body marking : AM2431BSDFHIALV 2BP167S)
Also, can you try connecting SoC device power before connecting the XDS560 and see if the Unable to connect to DAP error message persists?
KP: The error message still persists and we cannot connect to M3 core.
With an HS-FS device, it is expected that you would not be able to connect to the M3 core.
KP: Yes ,I believe this chip is SR2.0 and have HS FS. Thus we are not able to connect to M3 core. Also, we are using an custom boars and unfortunately we have not provided the option of UART boot mode. Thus we are unable to verify Device type using UART print.(I referred here..)
That page also includes additional details on the application boot + ccs gels with an HS-FS device.
KP: Thanks for pointing at this guide. We tried as per the guide .But below are our following observation.
1.We kept the Bootmode for DEVBOOT.[ Bootmode [3,8]=111101].
2.During Target configuration Board or device is chosen as "AM2431_ALV". Also, We choose the following initialization Scripts
R5_0_0 :"CPU_reset.gel"
M3_0 :" AM24x.gel"
M4F_0 :"CPU_reset.gel"
IGSS_G0: All bypassed
IGSS_G1 : All bypassed
Trace : Left blank.
3.After launching the configuration I tried to do DMSC initialization from CCS. Here are my observation
a. Scripting Console
js:> loadJSFile "C:\ti\mcu_plus_sdk_am243x_09_01_00_41\tools\ccs_load\am243x\load_dmsc_hsfs.js"
Connecting to MCU Cortex_R5_0!
Writing While(1) for R5F
Running the board configuration initialization from R5!
Error loading "C:/ti/mcu_plus_sdk_am243x_09_01_00_41/tools/ccs_load/am243x/sciclient_ccs_init.release.out": Timed out after 20000ms while waiting for target to halt after an auto-run to "main (C:\ti\mcu_plus_sdk_am243x_09_01_00_41\tools\ccs_load\am243x\load_dmsc_hsfs.js#116)
b. CIO
MAIN_Cortex_R5_0_0: GEL Output: CPU reset (soft reset) has been issued through GEL.
4.While trying to solve the above issue I Came across this e2e post.
a. The issue mentioned in the thread is same as what we are facing.
b. They are pointing the issue about SR version. But in my case the SR version is B(2.0).Thus I am believing this chip I am using has HS-FS.
c. Still for the sake of clarification I followed the recommendation of the thread and below are my observation:
ca. All Target configuration is same as point 2 .MCU+SDK version :"mcu_plus_sdk_am243x_08_06_00_45"
cb. Trial 1: Assuming its a GM. Using "load_dmsc.js"
In scripting console:
js:> loadJSFile "E:\sameep\m5_v2_tj\java_scripts\load_dmsc.js"
Connecting to DMSC_Cortex_M3_0!
Error connecting to the target: emulation failure occurred (E:\sameep\m5_v2_tj\java_scripts\load_dmsc.js#132)
CIO:
DMSC_Cortex_M3_0: Error connecting to the target: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 9.13.0.00201)
cb. Trial 2: Assuming its a HS-FS.
In scripting console:
js:> loadJSFile "E:\sameep\m5_v2_tj\java_scripts\load_dmsc_hsfs.js"
Connecting to MCU Cortex_R5_0!
Writing While(1) for R5F
Running the board configuration initialization from R5!
Error loading "C:/ti/mcu_plus_sdk_am243x_08_06_00_45/tools/ccs_load/am243x/sciclient_ccs_init.release.out": Timed out after 200000ms while waiting for target to halt after an auto-run to "main (E:\sameep\m5_v2_tj\java_scripts\load_dmsc_hsfs.js#116)!
CIO:
MAIN_Cortex_R5_0_0: GEL Output: CPU reset (soft reset) has been issued through GEL.
5.Just as a trail when "Running the board configuration initialization from R5!" print came in scripting console we manually loaded the .out file "C:\ti\mcu_plus_sdk_am243x_09_01_00_41\tools\ccs_load\am243x\sciclient_ccs_init.release.out" using Load program option in CCS. Below is our observation.
a.Both "load_dmsc_hsfs.js" and "sciclient_ccs_init.release.out" files are taken from "mcu_plus_sdk_am243x_08_06_00_45"
aa. Scripting Console
js:> loadJSFile "E:\sameep\m5_v2_tj\java_scripts\load_dmsc_hsfs.js"
Connecting to MCU Cortex_R5_0!
Writing While(1) for R5F
Running the board configuration initialization from R5!
Happy Debugging!!
ab. CIO:
MAIN_Cortex_R5_0_0: GEL Output: CPU reset (soft reset) has been issued through GEL.
MAIN_Cortex_R5_0_0: GEL Output: CPU reset (soft reset) has been issued through GEL.
b.Both "load_dmsc_hsfs.js" and "sciclient_ccs_init.release.out" files are taken from "mcu_plus_sdk_am243x_09_01_00_41"
Same as Above point.
Since there was no other prints related to initialization we felt that the initialization is not done properly. Is this correct?
Please guide us what could be the possible issue that is resulting in the timeout after "Running the board configuration initialization from R5!" print and restricting R5_0_0 to initialize as intended?
PS:In our board we don't have DDR. Thus While selecting Gel file is there any specific considerations to be made? or what we considered is correct?
Regards,
Kathir
Hi Kathir,
It looks like you are trying to load the software via R5 and you are not able to because ROM has firewalled the region. This may only happen when the boot mode is not Dev Boot Mode. In Dev Boot mode ROM opens up the firewall and allows side loading of application via JTAG. Can you confirm your boot mode is dev boot mode ?
Best Regards,
Aakash
Hi Aakash,
We have the boot mode. Now we are able to load the application via jtag. Thanks for your reply
Regards,
kathir