AM263P4: Multicore Sleep

Hi Sudhakar Elumalai Dhanasekar,

The device does not inherently supports low power mode. But it is achievable by configuring the clocks in software during runtime to enable low power mode.

What is magnitude of power consumption you are looking for in case of "low power mode" ?

Best Regards,
Aakash

Hi Aakash,

Currently I achieving the sleep by
a. Clock gate for unused clocks
b. Power off the unused ram banks
c. Executing wfi instruction

The core power consumption is going from 0.85W to 0.5W. This is the magnitude diff I was getting. Whether can we reduce to further ?

But my actual doubt is question 1.

Hi Aakash,

1. Under which register section I can find Core and Peripheral PLL's disable registers ?

2. In runtime is it okay to switch the core clock source from higher frequency to RCM10 ?

Hi Aakash,

I checked the API, it seems it is not Clock Gate API for the peripheral PLL clock. Could you please provide additional details to how to disable peripheral and core PLL, It'll be more helpfull

Sudhakar Elumalai Dhanasekar said:

1. When core 0 going to sleep remaining cores(core1c core2 & core3) also needs to go to sleep and similarly for wakeup, when core0 is wakeup. Is it achievable ? If yes, how can we achieve it.

Kindly share some insights on this as well