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TMS570LS1227: question about IOMM PINMMR registers configuration

Claudio Paglia
Prodigy 30 points
Part Number: TMS570LS1227
Other Parts Discussed in Thread: HALCOGEN, , TMS570LS1114, RM46L852, TMS570LS1224

Dear TI E2E design support staff,

i have a question about IOMM PINMMR registers configuration.

In particular, when using HalCoGen for QFP part, there appear some registers which are not referred in SPNU515C technical manual, table 4-21.

Following are statements from file pinmux.c used to configure PINMMR registers not mentioned in table 4-21:

pinMuxReg->PINMMR18 =   PINMUX_PIN_125_HET1_14 | PINMUX_PIN_126_GIOB_0;

pinMuxReg->PINMMR21 =   PINMUX_PIN_133_GIOB_1;

pinMuxReg->PINMMR24 =   ((~(pinMuxReg->PINMMR20 >> 17U) & 0x00000001U ) << 16U)  | ((~(pinMuxReg->PINMMR8 >> 9U) & 0x00000001U ) << 24U);

pinMuxReg->PINMMR25 =   ((~(pinMuxReg->PINMMR12 >> 17U) & 0x00000001U ) << 8U) | ((~(pinMuxReg->PINMMR7 >> 9U) & 0x00000001U ) << 16U) | ((~(pinMuxReg->PINMMR0 >> 26U) & 0x00000001U ) << 24U);

pinMuxReg->PINMMR26 =   ((~(pinMuxReg->PINMMR0 >> 18U) & 0x00000001U ) << 0U) | ((~(pinMuxReg->PINMMR9 >> 10U) & 0x00000001U ) << 8U);

pinMuxReg->PINMMR30 = 0x01010100U;

pinMuxReg->PINMMR32 = 0x00010101U;

Why do these registers have to be configured this way? Is there a technical manual to explain IOMM configuration with more detail?

Thanks for your attention and support,

best regards 

Claudio Paglia

  • +1
    TI__Mastermind 45960 points

    Hi Claudio,

    Agreed that those pins are missing on TMS570LS1227 TRM but you can do one thing.

    If you verify launchpad schematic of TMS570LS1227 then 

    Here you can find thsi device was hardware compatible with RM46x, so you can refer the TRM of RM46x to find out the pin details of those missing ones.

    For example, as you can see the definitions for PINMMR18 and PINMMR21.

    Similarly, you can search for other missing pins also and do the necessary confirmation on your application. And thanks for pointing this out, we will rectify this issue in the next document version.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    Prodigy 30 points

    Hi Jagadish,

    thank you for your response. I have searched in RM46x datasheet (spnu514c) and found informations on PINMMR18 and PINMMR23 only. 

    I have searched in other TRMs and i have found a more comprehensive description in spnu607a, which refers to TMS570LS09x/07x microcontrollers.

    Is it applicable to TMS570LS1227 parts also? 

    From IOMM registers description, i can see that PINMMR24, 25, 26, 30 and 32 are reserved, and i expected that the values to be stored in them would be the reset init values (0x01010101). But, strangely, HalCoGen evaluates these registers starting from other PINMMR configuration values, or reinitialize them with fixed values different from reset values (such as for PINMMR30 and PINMMR32). The relationships between all these registers is still not clear. 

    What does TI recommend for reserved registers? Can reset init values be used on runtime for reserved registers?

    Thanks for your attention and collaboration,

    best regards

    Claudio Paglia

  • +1 in reply to Claudio Paglia
    TI__Mastermind 45960 points

    Hi Claudio,

    Claudio Paglia said:
    Is it applicable to TMS570LS1227 parts also? 

    They are not fully pin to pin compatible.

    The TMS570LS1127 will be compatible with TMS570LS1224, RM46L852 and TMS570LS1114 in their respective available packages.

    --
    Thanks & Regards,
    Jagadish.