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[FAQ] TMDSCNCD263: AM243x to AM263x/AM263Px CPSW guide

Shaunak Deshpande
Genius 11996 points
Part Number: TMDSCNCD263

Hi experts,

Is the CPSW on the TI AM243x, TI AM263x and TI AM263Px same? Are there any differences in the hardware functionality and software offering? Can you please explain the differences in detail.

Thanks

  • 0
    TI__Genius 11996 points

    Hi,

    CPSW or Common Platform Switch is a hardware switch providing ethernet functionality to the TI AM2x devices. The AM26x devices carry a 3-port Gigabit CPSW3G subsystem. The 3-port gigabit ethernet subsystem supports two external MAC ports and one internal CPPI (communications port programming interface) or Host port.

    The CPSW IP on AM243x andAM263x/AM263Px has different IP versions of the CPSW3G.

    Note: The hardware, driver, syscfg and software differences were captured over the MCU_PLUS_SDK 09.02 release. With newer releases, more software examples will be enabled and syscfg differences will be reduced. Check out the release notes of the new SDK versions to get more information.

    Software

    From software perspective, the offerings for AM243x and AM263x/AM263Px are very similar with a few differences as discussed below: 

    The syscfg differences are documented below:

    Parameter
    AM243x
    AM263x/AM263Px
    Independently Checksum offload for Rx and Tx

    Cannot be independently disabled

    Can be independently disabled for Rx and Tx
    Disable state machine on Open Planned to be added in future releases

    Supported
    Monitor PHY addresses Planned to be added in future releases

    Supported
    Disable RGMII1 or RGMII2 from syscfg

    Supported

    Planned to be added in future releases

    The key enet-cpsw driver differences are documented below:

    Parameter
    AM243x
    AM263x/AM263Px
    Interrupt pacing Supported via Timer based interrupt pacing Supported in CPDMA
    Scatter gather Supported (static memory allocation) Supported (dynamic memory allocation)
    AutoPHY support Not supported Supported

    The key SDK Example differences are documented below:

    Parameter
    AM243x
    AM263x
    AM263Px
    enet_cpsw_fast_startup Supported Supported Planned for future releases
    enet_tx_scatter_gather Not supported Supported Supported
    cpsw_lwip_mqtt Supported Supported Planned for future releases

    Impact of missing software features:

    • Scatter gather and interrupt pacing is supported in both AM243x and AM263x, only the underlying architecture is different because of different DMA engines
    • On AM243x, there is no option to disable only the Tx or the Rx checksum offloading because the same register is used to configure both.
    • The syscfg differences will be addressed in the upcoming releases and the impact of missing features is low

    Hardware

    The key hardware differences are documented below:

    Feature
    AM243x
    AM263x/AM263Px
    Per port Castagnoli CRC frame check sequence including host interface for point to point switching, this is negotiated in LLDP to improve protection. Supported Limited Support (Host Castagnoli removed for Area)
    Programmable interrupt control with selected interrupt pacing Not Supported Supported
    8 Core Support Not Supported Supported
    CPPI 3.1 Low cost Multi Channel DMA support up to 8 Cores Not Supported Supported
    Streaming Packet Interface support for 64 threads or flows Supported Not Supported
    High and low host performance interface options. The High performance mode is used to obtain 40G ingress/egress to the host. Supported Not Supported
    MII Supported Not Supported (pin limitation)
    SGMII Supported Not Supported (requires SERDES)
    ECC rsel Supported Not Supported
    TSN/IET - Interspersed Express Traffic (Pre-emption by another name)IEEE802.3br/IEEE802.1Qbu Supported Not Supported
    Cut thru switching Supported Not Supported

    Number of InterVLAN Routes 

    		 4 2

    DMA engine

    		 UDMA CPDMA

    PSIL (Packet Streaming Interface Layer)

    		 Interfaced with UDMA CPDMA takes care of the packet streaming between MAC and system memory

    The CPSW MMR registers are also different. For register level changes, please refer to the TRM and register guide of the AM243x, AM263x/AM263Px device.

    Note:

    Regards,
    Shaunak