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Original question:

AM6442: Compare router to trigger bcdma

MCU-PLUS-SDK-AM243X: AM243x, Trigger BCDMA transfer using GPIO interrupt

Boshra
Intellectual 418 points
Part Number: MCU-PLUS-SDK-AM243X
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi, 

I'm using AM243x. I want to trigger a BCDMA channel transfer using a GPIO interrupt using L2G. 

I have previously asked the question and got this answer: 

https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1261456/am6442-compare-router-to-trigger-bcdma/4785658?tisearch=e2e-sitesearch&keymatch=%2520user%253A563969#4785658 

Now that I'm trying to configure it by sending the SCIclient message, it returns an unsuccessful. Previously I was told that since the GPIOMUX_out_16 is not routed, so I considered it can be the reason that it fails. I was told I should add it in the sciclient_defaultBoardcfg_rm.c as follows: 

 

When I try to add it in boardcfg Sysconfig tool, it gives an error that it exceeds the number of resources as here: 

 

these are the configurations for the message that I'm sending to allocate a GPIO interrupt to trigger a bcdma_blkcpy channel. by mapping the interrupt to GPIOMUX_OUTP_16 mapped to L2G_24. the fields of the sciclient message to configure the interrupt is as in the second following picture. 

  • 0
    TI__Mastermind 49808 points

    Hi Boshra,

    Thanks for reaching out to Texas Instruments E2E support forum.

    A similar use case has already been discussed in an FAQ. Please refer faq-how-to-trigger-dma-with-the-help-of-gpio-on-am64x-am243-and-am62x-devices for more details.

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Intellectual 418 points

    Hello, 
    I have already read the FAQ and my question is not addressed there. Please reread my question. My problem is configuring the boardcfg and as I showed you it gives me an error that is impossible to have more than 16 gpiomux, which was not discussed.

    This means that syconfig gives me an error as if there are not more than 16 gpiomux existing to be allocated. what I need is the 17th and 18th gpiomuxes but it's impossible to add them neither for am64x nor for am243x. 

    however, based on the figures used in the FAQ you mentioned (following image):

    it seems that they have been able to generate 17 gpiomux (0 to 16) which is impossible to make it in syscfg. I have also added our syscfg file, where we are not able to add more gpiomux. Would appreciate it if you could try this file and check why we are not able to do so. 

    Thanks, 

    Boshra


    Fullscreen am64x-evm.txt Download 
    /**
 * These arguments were used when this file was generated. They will be automatically applied on subsequent loads
 * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
 * @cliArgs --device "AM64x" --package "ALV" --part "Default" --product "K3-Respart-Tool@0.5"
 * @versions {"tool":"1.20.0+3587"}
 */

/**
 * Import the modules used in this configuration.
 */
const MAIN_0_R5_1       = scripting.addModule("/modules/am64x/MAIN_0_R5_1");
const MAIN_1_R5_1       = scripting.addModule("/modules/am64x/MAIN_1_R5_1");
const resourceSharing   = scripting.addModule("/modules/resourceSharing", {}, false);
const resourceSharing1  = resourceSharing.addInstance();
const resourceSharing2  = resourceSharing.addInstance();
const resourceSharing3  = resourceSharing.addInstance();
const resourceSharing4  = resourceSharing.addInstance();
const resourceSharing5  = resourceSharing.addInstance();
const resourceSharing6  = resourceSharing.addInstance();
const resourceSharing7  = resourceSharing.addInstance();
const resourceSharing8  = resourceSharing.addInstance();
const resourceSharing9  = resourceSharing.addInstance();
const resourceSharing10 = resourceSharing.addInstance();
const resourceSharing11 = resourceSharing.addInstance();
const resourceSharing12 = resourceSharing.addInstance();
const resourceSharing13 = resourceSharing.addInstance();
const resourceSharing14 = resourceSharing.addInstance();
const resourceSharing15 = resourceSharing.addInstance();
const resourceSharing16 = resourceSharing.addInstance();
const resourceSharing17 = resourceSharing.addInstance();
const resourceSharing18 = resourceSharing.addInstance();
const resourceSharing19 = resourceSharing.addInstance();
const resourceSharing20 = resourceSharing.addInstance();
const resourceSharing21 = resourceSharing.addInstance();
const resourceSharing22 = resourceSharing.addInstance();
const resourceSharing23 = resourceSharing.addInstance();
const resourceSharing24 = resourceSharing.addInstance();

/**
 * Write custom configuration values to the imported modules.
 */
MAIN_0_R5_1.allocOrder                                          = 2;
MAIN_0_R5_1.Compare_event_Interrupt_Router_count                = 4;
MAIN_0_R5_1.Block_Copy_DMA_Block_copy_channels_count            = 6;
MAIN_0_R5_1.Block_Copy_DMA_Split_TR_Rx_channels_count           = 6;
MAIN_0_R5_1.Block_Copy_DMA_Split_TR_Tx_channels_count           = 6;
MAIN_0_R5_1.DMASS_Interrupt_aggregator_Virtual_interrupts_count = 14;
MAIN_0_R5_1.DMASS_Interrupt_aggregator_Global_events_count      = 256;
MAIN_0_R5_1.Packet_DMA_Free_Tx_channels_count                   = 3;
MAIN_0_R5_1.Packet_DMA_Free_Rx_channels_count                   = 3;
MAIN_0_R5_1.Packet_DMA_Rings_for_IPC_count                      = 2;
MAIN_0_R5_1.shareResource                                       = "MAIN_0_R5_0";
MAIN_0_R5_1.Main_GPIO_Interrupt_Router_count                    = 8;

MAIN_1_R5_1.allocOrder                                          = 4;
MAIN_1_R5_1.Compare_event_Interrupt_Router_count                = 4;
MAIN_1_R5_1.Block_Copy_DMA_Block_copy_channels_count            = 4;
MAIN_1_R5_1.Block_Copy_DMA_Split_TR_Rx_channels_count           = 4;
MAIN_1_R5_1.Block_Copy_DMA_Split_TR_Tx_channels_count           = 4;
MAIN_1_R5_1.DMASS_Interrupt_aggregator_Virtual_interrupts_count = 14;
MAIN_1_R5_1.DMASS_Interrupt_aggregator_Global_events_count      = 256;
MAIN_1_R5_1.Packet_DMA_Free_Tx_channels_count                   = 4;
MAIN_1_R5_1.Packet_DMA_Free_Rx_channels_count                   = 4;
MAIN_1_R5_1.Packet_DMA_Rings_for_IPC_count                      = 2;
MAIN_1_R5_1.Main_GPIO_Interrupt_Router_count                    = 8;

resourceSharing1.$name            = "modules_resourceSharing0";
resourceSharing1.resourceName     = "Packet DMA CPSW Tx channels";
resourceSharing1.sharedToHostName = "MAIN_0_R5_1";

resourceSharing2.$name            = "modules_resourceSharing1";
resourceSharing2.resourceName     = "Packet DMA CPSW Rx channel";
resourceSharing2.sharedToHostName = "MAIN_0_R5_1";

resourceSharing3.$name            = "modules_resourceSharing2";
resourceSharing3.resourceName     = "Packet DMA CPSW Rx flows";
resourceSharing3.sharedToHostName = "MAIN_0_R5_1";

resourceSharing4.$name            = "modules_resourceSharing3";
resourceSharing4.resourceName     = "Packet DMA Rings for CPSW Tx channel";
resourceSharing4.sharedToHostName = "MAIN_0_R5_1";

resourceSharing5.$name            = "modules_resourceSharing4";
resourceSharing5.resourceName     = "Packet DMA Rings for CPSW Rx channel";
resourceSharing5.sharedToHostName = "MAIN_0_R5_1";

resourceSharing6.$name            = "modules_resourceSharing6";
resourceSharing6.resourceName     = "Packet DMA SA2UL Tx channel1";
resourceSharing6.sharedToHostName = "MAIN_0_R5_1";

resourceSharing7.$name            = "modules_resourceSharing7";
resourceSharing7.resourceName     = "Packet DMA SA2UL Rx channel2";
resourceSharing7.sharedToHostName = "MAIN_0_R5_1";

resourceSharing8.$name            = "modules_resourceSharing8";
resourceSharing8.resourceName     = "Packet DMA SA2UL Rx channel3";
resourceSharing8.sharedToHostName = "MAIN_0_R5_1";

resourceSharing9.$name            = "modules_resourceSharing9";
resourceSharing9.resourceName     = "Packet DMA ICSSG0 Tx channels";
resourceSharing9.sharedToHostName = "MAIN_0_R5_1";

resourceSharing10.$name            = "modules_resourceSharing10";
resourceSharing10.resourceName     = "Packet DMA ICSSG0 Rx channel";
resourceSharing10.sharedToHostName = "MAIN_0_R5_1";

resourceSharing11.$name            = "modules_resourceSharing11";
resourceSharing11.resourceName     = "Packet DMA ICSSG1 Tx channels";
resourceSharing11.sharedToHostName = "MAIN_0_R5_1";

resourceSharing12.$name            = "modules_resourceSharing12";
resourceSharing12.resourceName     = "Packet DMA ICSSG1 Rx channel";
resourceSharing12.sharedToHostName = "MAIN_0_R5_1";

resourceSharing13.$name            = "modules_resourceSharing13";
resourceSharing13.resourceName     = "Packet DMA ICSSG0 Rx flows";
resourceSharing13.sharedToHostName = "MAIN_0_R5_1";

resourceSharing14.$name            = "modules_resourceSharing14";
resourceSharing14.resourceName     = "Packet DMA ICSSG1 Rx flows";
resourceSharing14.sharedToHostName = "MAIN_0_R5_1";

resourceSharing15.$name            = "modules_resourceSharing15";
resourceSharing15.resourceName     = "Packet DMA Rings for ICSSG0 Tx channel";
resourceSharing15.sharedToHostName = "MAIN_0_R5_1";

resourceSharing16.$name            = "modules_resourceSharing16";
resourceSharing16.resourceName     = "Packet DMA Rings for ICSSG0 Rx channel";
resourceSharing16.sharedToHostName = "MAIN_0_R5_1";

resourceSharing17.$name            = "modules_resourceSharing17";
resourceSharing17.resourceName     = "Packet DMA Rings for ICSSG1 Tx channel";
resourceSharing17.sharedToHostName = "MAIN_0_R5_1";

resourceSharing18.$name            = "modules_resourceSharing18";
resourceSharing18.resourceName     = "Packet DMA Rings for ICSSG1 Rx channel";
resourceSharing18.sharedToHostName = "MAIN_0_R5_1";

resourceSharing19.$name            = "modules_resourceSharing19";
resourceSharing19.resourceName     = "Packet DMA SA2UL Rx channel2 flows";
resourceSharing19.sharedToHostName = "MAIN_0_R5_1";

resourceSharing20.$name            = "modules_resourceSharing20";
resourceSharing20.resourceName     = "Packet DMA Rings for SA2UL Rx channel3";
resourceSharing20.sharedToHostName = "MAIN_0_R5_1";

resourceSharing21.$name            = "modules_resourceSharing21";
resourceSharing21.resourceName     = "Packet DMA Rings for SA2UL Rx channel2";
resourceSharing21.sharedToHostName = "MAIN_0_R5_1";

resourceSharing22.$name            = "modules_resourceSharing22";
resourceSharing22.resourceName     = "Packet DMA SA2UL Rx channel3 flows";
resourceSharing22.sharedToHostName = "MAIN_0_R5_1";

resourceSharing23.$name            = "modules_resourceSharing23";
resourceSharing23.resourceName     = "Packet DMA Rings for SA2UL Tx channel1";
resourceSharing23.sharedToHostName = "MAIN_0_R5_1";

resourceSharing24.$name              = "modules_resourceSharing5";
resourceSharing24.resourceName       = "Main GPIO Interrupt Router";
resourceSharing24.sharedFromHostName = "MAIN_0_R5_1";

  • 0 in reply to Boshra
    TI__Mastermind 49808 points

    Hello Boshra,

    Thanks for clarifying the details.

    Please allow some time to check the above and revert back.

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Expert 1550 points

    Hi, Tushar:

    please take a look at ResDependencies.Json,

    the sysconfig tool for boradconfiguration only allows 16  resources assigned to AM64X_DEV_MAIN_GPIOMUX_INTROUTER0

    and 12 resources assign to ICSSG_0,  see "the image cut".

    I can change to 17, right? or add another entry.   it won't violate the rule, at sysfw_boardcfg_rules.json,   in rules, I saw you are allowed to allocate up to 54 resources to  AM64X_DEV_MAIN_GPIOMUX_INTROUTER0



    Thanks. 

  • +1 in reply to Tushar Thakur
    TI__Mastermind 49808 points

    Hello Boshra,

    I can check that the GPIOMUX_INTROUT_16 is not configurable through the resource partitioning tool.

    Can you please directly update the entry inside sciclient_defaultBoardCfg_rm.c file located at ${MCU+SDK}/source/drivers/sciclient/scilcient_default_boardcfg/am64x_am243x and update the result?

    Please refer the below image.

    After adding the above piece of code, do the following.

    • Rebuild the sysfw blob.
    • Rebuild the SBL examples.
    • Re-flash the SBL binary.

    Run the command from root of ${MCU+SDK} to create sysfw blob and SBL binary.

    gmake -s -C tools/sysfw/boardcfg/
gmake -s sbl clean
gmake -s sbl

    After performing the above steps, you will now be able to run the example. Please let us know if the above solution works.

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Expert 1550 points

    Hi Tushar:

    In addition to your post. 

    we need also to increase the entries_size.


    original entry size +1

    Am I right?

    Thanks,

  • 0 in reply to Jun Tu
    TI__Mastermind 49808 points

    Hi Jun,

    Jun Tu said:
    Am I right?

    Yes, correct. Please update the entry size by +1.

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Intellectual 418 points

    Hi Tushar, 

    I have modified the file and did all the steps after to regenerate the boardcfg based on the new configuration and also rebuild the sciclient_ccs_init, etc. 

    However, the example provided to me still does not work! so even with the new boardcfg, the example does not work. and Sciclient_rmIrqProgramRoute returns an error status. 

    Can you please take the project folder that was given to me and verify if it works on your side? Can you verify that the sciclient Sciclient_rmIrqProgramRoute not returning an error? because on my side even with modified boardcfg it does not work. 

    The example folder is passed to me in this thread:
    https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1261456/am6442-compare-router-to-trigger-bcdma/4785658?tisearch=e2e-sitesearch&keymatch=%2520user%253A563969#4785658

    Thanks, 
    Boshra

  • 0 in reply to Boshra
    TI__Mastermind 49808 points

    Hi Boshra,

    Can you please share the sciclient_defaultBoardCfg_rm.c file with us?

    Regards,

    Tushar

  • 0 in reply to Tushar Thakur
    Intellectual 418 points

    You can find these lines that are added in the following attached code: 


    {
    .num_resource = 2,
    .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
    .start_resource = 16,
    .host_id = TISCI_HOST_ID_ALL,
    },

    /*
 * K3 System Firmware Resource Management Configuration Data
 * Auto generated from K3 Resource Partitioning tool
 *
 * Copyright (c) 2018-2023, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
/**
 *  \file sciclient_defaultBoardcfg_rm.c
 *
 *  \brief File containing the rm boardcfg default data structure to
 *      send TISCI_MSG_BOARD_CONFIG_RM message.
 *
 */
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */

#include <drivers/sciclient.h>
#include <drivers/sciclient/include/tisci/am64x_am243x/tisci_hosts.h>
#include <drivers/sciclient/include/tisci/am64x_am243x/tisci_boardcfg_constraints.h>
#include <drivers/sciclient/include/tisci/am64x_am243x/tisci_devices.h>

/* ========================================================================== */
/*                            Global Variables                                */
/* ========================================================================== */

/* \brief Structure to hold the RM board configuration */
struct tisci_local_rm_boardcfg {
    struct tisci_boardcfg_rm      rm_boardcfg;
    /**< Board configuration parameter */
    struct tisci_boardcfg_rm_resasg_entry resasg_entries[TISCI_RESASG_ENTRIES_MAX];
    /**< Resource assignment entries */
};

const struct tisci_local_rm_boardcfg gBoardConfigLow_rm
__attribute__(( aligned(128), section(".boardcfg_data") )) =
{
    .rm_boardcfg = {
        .rev = {
            .tisci_boardcfg_abi_maj = TISCI_BOARDCFG_RM_ABI_MAJ_VALUE,
            .tisci_boardcfg_abi_min = TISCI_BOARDCFG_RM_ABI_MIN_VALUE,
        },
        .host_cfg = {
            .subhdr = {
                .magic = TISCI_BOARDCFG_RM_HOST_CFG_MAGIC_NUM,
                .size = (uint16_t) sizeof(struct tisci_boardcfg_rm_host_cfg),
            },
            .host_cfg_entries = {
                {
                    .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
                    .allowed_atype = 0b101010,
                    .allowed_qos   = 0xAAAA,
                    .allowed_orderid = 0xAAAAAAAA,
                    .allowed_priority = 0xAAAA,
                    .allowed_sched_priority = 0xAA
                },
                {
                    .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
                    .allowed_atype = 0b101010,
                    .allowed_qos   = 0xAAAA,
                    .allowed_orderid = 0xAAAAAAAA,
                    .allowed_priority = 0xAAAA,
                    .allowed_sched_priority = 0xAA
                },
            },
        },
        .resasg = {
            .subhdr = {
                .magic = TISCI_BOARDCFG_RM_RESASG_MAGIC_NUM,
                .size = (uint16_t) sizeof(struct tisci_boardcfg_rm_resasg),
            },
            .resasg_entries_size = 108 * sizeof(struct tisci_boardcfg_rm_resasg_entry),
        },
    },
    .resasg_entries = {
        {
            .num_resource = 4,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
            .start_resource = 16,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
        },
        {
            .num_resource = 4,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
            .start_resource = 16,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
        },
        {
            .num_resource = 4,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
            .start_resource = 24,
            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
        },
        {
            .num_resource = 8,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_CMP_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
            .start_resource = 32,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 8,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
            .start_resource = 0,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
        },
        {
            .num_resource = 8,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
            .start_resource = 8,
            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
        },
		{
            .num_resource = 2,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_MAIN_GPIOMUX_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
            .start_resource = 16,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 41,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_TIMESYNC_EVENT_INTROUTER0, TISCI_RESASG_SUBTYPE_IR_OUTPUT),
            .start_resource = 0,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 136,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER),
            .start_resource = 50176,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 1,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG),
            .start_resource = 0,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 6,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
            .start_resource = 0,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
        },
        {
            .num_resource = 6,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
            .start_resource = 0,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
        },
        {
            .num_resource = 4,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
            .start_resource = 6,
            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
        },
        {
            .num_resource = 18,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN),
            .start_resource = 10,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 6,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
            .start_resource = 48,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
        },
        {
            .num_resource = 6,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
            .start_resource = 48,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
        },
        {
            .num_resource = 4,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
            .start_resource = 54,
            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
        },
        {
            .num_resource = 10,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN),
            .start_resource = 58,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 6,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN),
            .start_resource = 28,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
        },
        {
            .num_resource = 6,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_BCDMA_0, TISCI_RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN),
            .start_resource = 28,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
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            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_1_CHAN),
            .start_resource = 32,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 1,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_2_CHAN),
            .start_resource = 19,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 8,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_2_CHAN),
            .start_resource = 40,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 1,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_3_CHAN),
            .start_resource = 20,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 8,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_3_CHAN),
            .start_resource = 40,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 4,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_0_RX_CHAN),
            .start_resource = 21,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 64,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_0_RX_CHAN),
            .start_resource = 48,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 4,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_ICSSG_1_RX_CHAN),
            .start_resource = 25,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 64,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_1_RX_CHAN),
            .start_resource = 112,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 1,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_ERROR_OES),
            .start_resource = 0,
            .host_id = TISCI_HOST_ID_ALL,
        },
        {
            .num_resource = 2,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
            .start_resource = 20,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
        },
        {
            .num_resource = 2,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
            .start_resource = 20,
            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
        },
        {
            .num_resource = 2,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
            .start_resource = 22,
            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
        },
        {
            .num_resource = 8,
            .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_RINGACC_0, TISCI_RESASG_SUBTYPE_RA_GENERIC_IPC),
            .start_resource = 24,
            .host_id = TISCI_HOST_ID_ALL,
        },
    }
};

  • 0 in reply to Boshra
    Intellectual 418 points

    our problem is resolved. it was an internal problem, our environment has been changed... 

    Thanks, 
    Boshra

  • 0 in reply to Boshra
    TI__Mastermind 49808 points

    Hi Boshra,

    Thanks for the confirmation.

    Closing the thread.

    Regards,

    Tushar