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Tool/software:
In AM2434 Sitara MUC+SDK user guide it was clearly mentioned that the OCRAM first 512KB is for SBL. Could you help in knowing the memory map Layout for AM2634.
AM243x MCU+ SDK: Memory Map Layout (ti.com)
with Regards
sunilkalivarapu
Thanks TEMC for your query, Appreciate your feedback we will get it added to our documentation
the OCRAM first 512KB is for SBL. Could you help in knowing the memory map Layout for AM2634.
You can check out the boot memory map in TRM under section 5.7
The requirement is that SBL needs to be present at 0x70002000.
Take a look at this FAQ for more details on how you can recover the SBL memory for your application
e2e.ti.com/.../faq-mcu-plus-sdk-am243x-use-sbl-s-memory-from-application
Actually, I need the memory layout and organization for OCRAM as the application image for the code has been loaded at OCRAM from QSPI.
You Can refer to linker file of the SBL QSPI example project. Also I was able to put the same in PPT for the graphical view. Hope this helps.
What is the maximum application image file size for each core in Am2634? If my application image is 1MB for each core (Total 4MB stored in external flash), then how my application image RPRC files has been loaded into OCRAM and how the parsing of multicore file will complete using QSPI boot mode?
with Regards
sunilkalivarapu
What is the maximum application image file size for each core in Am2634?
The max image size would be 512 KB per core as max ram size is 2MB, given you are recovering back the space used by sbl once sbl execution completes(as described here: e2e.ti.com/.../faq-mcu-plus-sdk-am243x-use-sbl-s-memory-from-application)
If my application image is 1MB for each core (Total 4MB stored in external flash), then how my application image RPRC files has been loaded into OCRAM and how the parsing of multicore file will complete using QSPI boot mode?
This would not be possible as RAM size id 4MB only.
On our Am263Px and future devices we have XIP enabled so you have flexibility to execute from flash, ie keep rodata and code in flash and cpu is directly able to read from flash instead of copying it to ram