AM2634: Interrupt Nesting

Sue A

Part Number: AM2634

Tool/software:

Hi TI,

Is there a register that is used to enable interrupt nesting? How to allow interrupt nesting from the same interrupt source?

I am triggering an interrupt from ADC which is registered as shown below. I want a new interrupt from the same source to enter the same ISR if the previous interrupt ISR overruns its duration.

I have tried enabling global interrupts after entering ISR (using HwiP_enable()) to allow interrupt nesting, but it has not helped. Please advice if I am missing anything?

Request your inputs at the earliest as this is currently a roadblock for further testing with customer.

HwiP_Params_init(&hwiPrms);
hwiPrms.intNum = CSLR_R5FSS0_CORE0_CONTROLSS_INTRXBAR0_OUT_1;
hwiPrms.callback = Sys_Adc_Isr;
hwiPrms.priority = 8;
hwiPrms.isPulse = TRUE;
hwiPrms.isFIQ = 0;
(void) HwiP_construct(&HwiObject, &hwiPrms);

4 months ago

0 Rijohn Pius 4 months ago

TI__Expert 3430 points

Hi Sue A,

Thank you for the query!!

We have assigned the query to associated Subject Matter Experts.
Should be able to provide an answer by 9/5/2025

Thanks & Regards,
Rijohn

0 Sahana H G 4 months ago

TI__Expert 5686 points

Hi Sue,

Could you please let me know if you're clearing the VIM STS at the beginning of the ISR as required for "Pulse" interrupts, and do you see it getting set when an interrupt from the same source occurs while the ISR executes?

Regards,

Sahana

0 Sue A 4 months ago in reply to Sahana H G

Intellectual 300 points

Hi Sahana,

my ISR is defined as below:

void Sys_Adc_Isr(void *handle)
{
ADC_clearInterruptStatus(ADC2_BASE_ADDR, ADC_INT_NUMBER1);

/* application code */
}

As soon as I enter the ADC ISR, I clear the ADC interrupt flag to allow for the next interrupt to trigger on time.
As soon as I enter the ISR and before executing ADC_clearInterruptStatus(ADC2_BASE_ADDR, ADC_INT_NUMBER1), the register status is as below -

After I execute ADC_clearInterruptStatus(ADC2_BASE_ADDR, ADC_INT_NUMBER1), the register status is -

Could you please reproduce this scenario on your end and let me know if you are able to nest the interrupts from single source?
TRM says when an interrupt is active, all the interrupts of equal priority are masked. In this case, is it possible to nest interrupts from single source that call the same ISR with same priority? Or is there a register to enable interrupt nesting that I have missed? Please let me know.

Would appreciate your inputs at the earliest. Thank you!

0 Sahana H G 4 months ago in reply to Sue A

TI__Expert 5686 points

Hi Sue,

Sue A said:
is it possible to nest interrupts from single source that call the same ISR with same priority

Yes, this is not supported in hardware, but in the MCU PLUS SDK, IRQ nesting is emulated in software with the help of reentrant interrupt handlers (AM263x MCU+ SDK: Optimizing applications with MCU SDK). Please refer to the following E2E which describes how to enable interrupt nesting of the same interrupt using low level interrupt handlers: (+) AM2634: Does AM263 support self interrupt nesting? - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums, with a modification in the macro ISR_CALL_PULSE_NONFLOAT_SELF_REENTRANT as suggested. Hope this helps!

Regards,

Sahana