Part Number: AM263P4
I am working on the evaluation of a new embedded platform based on the AM263P.
I would like to address several topics regarding this MCU, in order of priority:
Bootloader
Our current bootstrap procedure on Cortex-M with external flash is as follows:
– The MCU loads from flash to RAM a minimal L1 boot responsible for initializing the flash driver (e.g., full-speed SPI depending on vendor, encryption, etc.).
– The L1 boot verifies the L2 boot stored in flash (e.g., using a digital signature).
– The L1 boot loads the L2 boot into RAM; the L2 boot manages the targeted OTA link (e.g., UART).
– If no upgrade is required, the L2 boot checks the application image stored in encrypted flash area A (e.g., using a digest and/or digital signature). If the application is valid, it is copied to RAM and/or executed in XIP.
– If an upgrade is required, the L2 boot writes the new application chunks into encrypted flash area B.
– At the end of the upgrade, the L2 boot checks the application image stored in encrypted flash area B (e.g., using a digest and/or digital signature). If the application is valid, it is copied to area A and executed.
Questions:
- Is this procedure—or an equivalent one—feasible on the AM263P?
- If so, could you kindly provide documentation and/or examples for:
– Configuring flash partitioning and encryption
– Managing the boot procedure for a multi-core application
CAN FD
- Do you have any SDK or application notes supporting a CANopen FD stack?
- Do you have any SDK or application notes supporting the Cyphal stack?
FreeRTOS support
- Is it possible to have the kernel provided in source form rather than as a static library?
IPC
- Do you have any SDK or application notes supporting OpenAMP for inter-core communication?
Industrial Ethernet
- Do you have any SDK or application notes supporting EtherCAT (slave and/or master)?
- Do you have any SDK or application notes supporting the following TSN profiles:
– 802.1AS (PTP)
– 802.1Qbv (scheduled traffic)
