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UNLOCKING NMI PIN PF0

Hi, I am using TM4C1230, i want to make NMI pin PF0 as GPIO pin can any tell me how to do it. as i went through the datasheet got to know that we need to unlock it. and i used these steps to do it. HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY_DD; HWREG(GPIO_PORTD_BASE + GPIO_O_CR) = 0x80; HWREG(GPIO_PORTD_BASE + GPIO_O_AFSEL) |= 0x400; HWREG(GPIO_PORTD_BASE + GPIO_O_DEN) |= 0x80; HWREG(GPIO_PORTD_BASE + GPIO_O_LOCK) = 0;

  • Hi,

    Your code contradicts your intent: you would like it to be PF0, but modify PORTD - a clean code could look like this:

    // Unlock PF0 so we can change it to a GPIO input
    // Once we have enabled (unlocked) the commit register then re-lock it
    // to prevent further changes.
    //
    HWREG(BUTTONS_GPIO_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(BUTTONS_GPIO_BASE + GPIO_O_CR) |= 0x01;
    HWREG(BUTTONS_GPIO_BASE + GPIO_O_LOCK) = 0;

    Petrei

  • Hi,

    its giving error if i use "BUTTONS_GPIO_BASE

  • Hi 

    am trying this to make PFO as GPIO pin

    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
    HWREG(GPIO_PORTF_BASE + GPIO_O_CR) |= 0x01;
    HWREG(GPIO_PORTF_BASE + GPIO_O_AFSEL) |= 0x000;
    HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = 0;

    is this correct steps to unlock PFO NMI pin

  • Hi,

    My code was an excerpt from ButtonsInit() function - (this is why is in blue) so yes, is OK to replace with GPIO_PORF_BASE. But  your third line involving AFSEL is useless - you must remove it.

    Petrei

  • hi,

    i removed that  alternate function enable line... and am making PFO low but it is still high...

    unlock code is follwed by this code

    ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE,GPIO_PIN_0);
    // ROM_GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_0,GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPD);
    GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_0,0x00);

  • hi,

    i want to make PF0 pin low, since it NMI pin first i unlocked it and then making it as an out pin and writing 0 to it.Is this the correct way.i followed the unlocking procedure what you given but still the pin is high.can you please help me out of this.. 

  • Hi,

    Insert these two lines before locking again:

    ROM_GPIODirModeSet(GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_DIR_MODE_OUT);
    ROM_GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_0, GPIO_STRENGTH_8MA, GPIO_PIN_TYPE_STD_WPD);
    Petrei
  • Petrei said:
    your third line involving AFSEL is useless

    Really?   As poster seeks to use PF0 as GPIO - and as AFSEL is required to be clear (0) to so serve - might you reconsider?

  • To clear the bit, the line would need to be written as:

    HWREG(GPIO_PORTF_BASE + GPIO_O_AFSEL) &= ~0x001;

    --Bobby

  • @cb1,

    My mistake - I was thinking the poster would call GPIODirModeSet which manage AFSEL...

    Petrei

  • @ friend Petrei,

    Did not consider that a "mistake" - reacted to, "useless."  (it was not)

    But do note - "GPIODirModeSet()" has been encapsulated (swallowed) w/in, "GPIOPinType()" - thus may be excess to many/most needs... (gpio.c reveals - for those who may care...)

  • In all these configs how can i really put my PF ports as a SSI1 module? Any configuration diferent from enabling it as a digital GPIO I/O?

  • Hi,

    If any time you have problems, you may use PinMux utility. Here it is what is generated quickly:

    void
    PortFunctionInit(void)
    {
        //
        // Enable Peripheral Clocks 
        //
        MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI1);
        MAP_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
    
        //
        // Enable pin PF2 for SSI1 SSI1CLK
        //
        MAP_GPIOPinConfigure(GPIO_PF2_SSI1CLK);
        MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_2);
    
        //
        // Enable pin PF0 for SSI1 SSI1RX
        // First open the lock and select the bits we want to modify in the GPIO commit register.
        //
        HWREG(GPIO_PORTF_BASE + GPIO_O_LOCK) = GPIO_LOCK_KEY;
        HWREG(GPIO_PORTF_BASE + GPIO_O_CR) = 0x1;
    
        //
        // Now modify the configuration of the pins that we unlocked.
        //
        MAP_GPIOPinConfigure(GPIO_PF0_SSI1RX);
        MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_0);
    
        //
        // Enable pin PF1 for SSI1 SSI1TX
        //
        MAP_GPIOPinConfigure(GPIO_PF1_SSI1TX);
        MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_1);
    
        //
        // Enable pin PF3 for SSI1 SSI1FSS
        //
        MAP_GPIOPinConfigure(GPIO_PF3_SSI1FSS);
        MAP_GPIOPinTypeSSI(GPIO_PORTF_BASE, GPIO_PIN_3);
    } 

    Petrei