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RM4 launchpad dead after flash

Other Parts Discussed in Thread: RM42L432, UNIFLASH
Using the "Blinky_Example" a modified example RM42L432 and TMX570LS0432 (Launchpad is two Hercules) are dead. Ie they can not be reprogrammed, even using an external emulator (j-link IAR KS). The modified code is part of the file "\ Blinky_Example \ source \ system.c":
 
void setupPLL(void)
{

/* USER CODE BEGIN (3) */
/* USER CODE END */

    /** - Configure PLL control registers */
    /** @b Initialize @b Pll1: */

    /**   - Setup pll control register 1:
    *     - Setup reset on oscillator slip
    *     - Setup bypass on pll slip
    *     - setup Pll output clock divider to max before Lock
    *     - Setup reset on oscillator fail
    *     - Setup reference clock divider
    *     - Setup Pll multiplier
    */
/*    systemREG1->PLLCTL1 =  0x00000000U
                        |  0x20000000U
                        | ((0x1F)<< 24U)
                        |  0x00000000U
                        | ((6U - 1U)<< 16U)
                        | ((120U - 1U)<< 8U);
*/
      systemREG1->PLLCTL1 = 0x21046300;                  //80MHz

    /**   - Setup pll control register 2
    *     - Enable/Disable frequency modulation
    *     - Setup spreading rate
    *     - Setup bandwidth adjustment
    *     - Setup internal Pll output divider
    *     - Setup spreading amount
    */
/*    systemREG1->PLLCTL2 =  0x00000000U
                        | (255U << 22U)
                        | (7U << 12U)
                        | ((2U - 1U)<< 9U)
                        |  61U;
*/
   systemREG1->PLLCTL2 = 0x3FC0723D;                     //80MHz
    /** @b Initialize @b Pll2: */

    /**   - Setup pll2 control register :
    *     - setup Pll output clock divider to max before Lock
    *     - Setup reference clock divider
    *     - Setup internal Pll output divider
    *     - Setup Pll multiplier
    */
    systemREG2->PLLCTL3 = ((2U - 1U) << 29U)
                        | ((0x1F)<< 24U)
                        | ((6U - 1U)<< 16U)
                        | ((120U - 1U) << 8U);

   /** - Enable PLL(s) to start up or Lock */
    systemREG1->CSDIS = 0x00000000U
                      | 0x00000000U
                      | 0x00000008U
                      | 0x00000080U
                      | 0x00000000U
                      | 0x00000000U
                      | 0x00000000U;

   systemREG1->CSDISCLR = 0x00000002U;                   // Enable clock source 1
   systemREG1->CSDIS |= 0xf9u;

}
 
JTAG signals are present, as the oscillator. nERROR remains high all the time. Obviously the program is not running.

     When this program "failed" was charged nERROR was observed that low for a few seconds, and then death.
 
Thanks
  • Gustavo,

    I apologize that no one has responded to you post until now.  I'm asking one of our launchpad experts to get back with you.  

  • Gustavo,

    Can you please share your project so I can have a look on what is going on?

  • 7658.blinky_example2.zip

    This is the project of the problem, but perhaps the problem is that both CPUs are experimental (TMX570LS0432PZQQ1 and xRM42L432PZT)
  • Gustavo,


    I'm working on your problem and trying to find a way to recover your board.

    Can you explain me what are you trying to achieve with the following statement:

       systemREG1->CSDIS |= 0xf9u;

    in the system.c void setupPLL(void) routine.

     

  • Gustavo,

    The function setupPLL is used to configure the PLL to the target frequency.
    In this example, the CPU is supposed torun at 80Mhz. Internally the PLL is programmed to run at 160Mhz.
    To avoid switching from Low to High clock frequency, during PLL lock, the output of the PLL is prescaled (160/32) = 5Mhz
    Once the PLL is lock, in the function mapClocks, the prescaler is switched back to /2 making the PLL running at 160/2=80Mhz.

    Your following modification in setupPLL are not recommended.

       systemREG1->PLLCTL1 = 0x21046300;                 //80MHz
       systemREG1->PLLCTL2 = 0x3FC0723D;                 //80MHz

    Also later on you have:

       systemREG1->CSDISCLR = 0x00000002U;                   // Enable clock source 1
       systemREG1->CSDIS |= 0xf9u;

    This is a killer. You are switching off the following clock source:
    OSCIN:                                   This clock is the source of the PLL.
    Low Frequency LPO
    High Frequency LPO           This clock is by default used by the clock detect module to monitor OSCIN.

    When you write F9 to CSDIS, you are killing OSCIN. That will kill the PLL. The clock detect will catch a missing OSCIN and will swith to HLPO. But you also killed HLPO. There is no more clock running in your device.
    As result, the CPU is stopped, clockless.

    When your reset the device, you re-run this deadly sequence. The debugger needs the CPU to reply to a signal (Debug Request), but the CPU will never reply without clock.

    One option to revive your board is to use NowFlash. This utility is used to program/erase the flash.

    Configure NowFlash as following:

    Then click on Execute. A new window will pop up and at the same time, reset the board multiple time using the nRST button (Not the nPORST)
    Eventually NowFLash will be able to take control of the device and will be able to erase the flash.

    Please let me know the result.

  • Thank you. I could solve the problem. The nowFlash is unavailable. His replacement is the CCS UniFlash. It was easy to create a new configuration. One is somewhat confusing conclusion that "Erase Cores ..." is to clear the memory.

    This issue has scared me, because it is the first time this happens to me "torturing" a CPU.

    This summary of the sequence I made:

    The second Launchpad that I repeated the operation is RM42. For the first I used TMS570LS043x

    Before I press the OK button on the launchpad RST and not released it to 1 or 2 seconds after you click OK. If it should fail to come back by varying the waiting time.

     

    Again thanks

  • Gustavo,

    I'm glad to see that you were able to recover your board.

    Thanks for this work-through using UniFlash. You are correct, NowFlash is no more available for download.

    Also your comment on "Erase Cores" should be a little more explicit. I will communicate this comment to our software team.