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TM4C129 EPI interface with SRAM

I am testing a TM4C129 connected to an CY7C1010DV33 sram. I am using ccs6.01, Stellars ICDI.
I write the code listed below:
#define ERAM(x)  HWREG(SRAM16_MAPPING_ADDRESS+SRAM16_SECTOR_ADDRESS+x)
     for ( i=0; i< 0x10000; i++ )
     {
//      ERAM(i*4) = i;
     }
     //check
     for ( i=0; i< 0x10000; i++ )
     {
      data = ERAM(i*4);
      if ( data != (unsigned int)i )
      {
          LED1_ON;
          //break;
      }
     }
I tested in ICDI debug mode and stand alone mode, the result are all sucsess.

I write another code.
add the code below in .cmd file.
    ERAM (RWX) : origin = 0x60080000, length = 0x00040000
    esram   :   > ERAM
the code is in main.c file
#pragma DATA_SECTION(eram_data, "esram");
unsigned int eram_data[0x10000];

#define SIZE  0x100
     for ( i=0; i< SIZE; i++ )
     {
      eram_data[i] = i+1;
     }
     //check
     for ( i=0; i< SIZE; i++ )
     {
      data = eram_data[i];
      if ( data != i+1 )
      {
       LED1_ON; //ON
          break;
      }
     }
I run it in ICDI debug mode, the MCU run into FaultISR(),The hard fault handler.
Who can help me? Thanks very much!

  • Hello Jian,

    Please have a look at the following post for diagnosing the Fault Issue

    http://e2e.ti.com/support/microcontrollers/tiva_arm/f/908/t/374640

    It is not very clear to me how it is working in ICDI debug mode when you tested it and not working in Run mode. Can you please clarify and also share the initialization code.

    Regards
    Amit
  • Hello Amit,

    Thanks very much for your reply. I am also developing the interface with ET1100 ( an EtherCAT slave) . Can you give me more advice? Thanks!

    The initialization code is below. I am sorry that I  don't know how to post attachment.

     

    int main(void)
    {
        uint32_t ui32Val;
        volatile uint32_t i, data, a,b,c;
        uint32_t ui32SysClock;

        //
        // Set the clocking to run at 120MHz from the PLL.
        // TODO: Update this call to set the system clock frequency your
        // application requires.
        //
        ui32SysClock = SysCtlClockFreqSet((SYSCTL_OSC_MAIN | SYSCTL_USE_PLL | SYSCTL_XTAL_25MHZ |
                                          SYSCTL_CFG_VCO_480), 120000000);

        //
        // Set up the serial console to use for displaying messages.  This is
        // just for this example program and is not needed for EPI operation.
        //
        SysCtlPeripheralEnable(SYSCTL_PERIPH_EPI0);

        //
        // For this example EPI0 is used with multiple pins on PortA, B, C, G, H,
        // K, L, M and N.  The actual port and pins used may be different on your
        // part, consult the data sheet for more information.
        // TODO: Update based upon the EPI pin assignment on your target part.
        //
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOG);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOH);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOK);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOL);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOM);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOP);
        SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOQ);

        //
        // This step configures the internal pin muxes to set the EPI pins for use
        // with EPI.  Please refer to the datasheet for more information about pin
        // muxing.
        //
        //
        // EPI0S00 ~ EPI0S03, H0 - 3
        //
        ui32Val = HWREG(GPIO_PORTH_BASE + GPIO_O_PCTL);
        ui32Val &= 0xFFFF0000;
        ui32Val |= 0x0000FFFF;
        HWREG(GPIO_PORTH_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTH_BASE + GPIO_O_DR8R) = 0xFF;

        //
        //  EPI0S24, EPI0S25, EPI0S31 : K0 ~ 3, K7, K6, K5
        //
        ui32Val = HWREG(GPIO_PORTK_BASE + GPIO_O_PCTL);
        ui32Val &= 0x00F0FFFF;
        ui32Val |= 0xFF0F0000;
        HWREG(GPIO_PORTK_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTK_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // EPI0S4 ~ EPI0S7: C4 ~ 7
        //
        ui32Val = HWREG(GPIO_PORTC_BASE + GPIO_O_PCTL);
        ui32Val &= 0x0000FFFF;
        ui32Val |= 0xFFFF0000;
        HWREG(GPIO_PORTC_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTC_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // EPI0S8 ~ EPI0S9: A6 ~ 7
        //
        ui32Val = HWREG(GPIO_PORTA_BASE + GPIO_O_PCTL);
        ui32Val &= 0x00FFFFFF;
        ui32Val |= 0xFF000000;
        HWREG(GPIO_PORTA_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTA_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // EPI0S10 ~ EPI0S11: G0 ~ 1
        //
        ui32Val = HWREG(GPIO_PORTG_BASE + GPIO_O_PCTL);
        ui32Val &= 0xFFFFFF00;
        ui32Val |= 0x000000FF;
        HWREG(GPIO_PORTG_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTG_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // EPI0S12 ~ EPI0S15: M0 ~ 3
        //
        ui32Val = HWREG(GPIO_PORTM_BASE + GPIO_O_PCTL);
        ui32Val &= 0xFFFF0000;
        ui32Val |= 0x0000FFFF;
        HWREG(GPIO_PORTM_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTM_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // EPI0S16 ~ EPI0S19, EPI0S26: L0 ~ 3, L4
        //
        ui32Val = HWREG(GPIO_PORTL_BASE + GPIO_O_PCTL);
        ui32Val &= 0xFFF00000;
        ui32Val |= 0x000FFFFF;
        HWREG(GPIO_PORTL_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTL_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // EPI0S20 ~ EPI0S23: Q0 ~ 3
        //
        ui32Val = HWREG(GPIO_PORTQ_BASE + GPIO_O_PCTL);
        ui32Val &= 0xFFFF0000;
        ui32Val |= 0x0000FFFF;
        HWREG(GPIO_PORTQ_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTQ_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // EPI0S27, EPI0S28 : B2, B3
        //
        ui32Val = HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL);
        ui32Val &= 0xFFFF00FF;
        ui32Val |= 0x0000FF00;
        HWREG(GPIO_PORTB_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTB_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // EPI0S29 ~ EPI0S30: P2 ~ 3
        //
        ui32Val = HWREG(GPIO_PORTP_BASE + GPIO_O_PCTL);
        ui32Val &= 0xFFFF00FF;
        ui32Val |= 0x0000FF00;
        HWREG(GPIO_PORTP_BASE + GPIO_O_PCTL) = ui32Val;
        HWREG(GPIO_PORTP_BASE + GPIO_O_DR8R) = 0xFF;

        //
        // Configure the GPIO pins for EPI mode.  All the EPI pins require 8mA
        // drive strength in push-pull operation.  This step also gives control of
        // pins to the EPI module.
        //
        GPIOPinTypeEPI(GPIO_PORTA_BASE, EPI_PORTA_PINS);
        GPIOPinTypeEPI(GPIO_PORTB_BASE, EPI_PORTB_PINS);
        GPIOPinTypeEPI(GPIO_PORTC_BASE, EPI_PORTC_PINS);
        GPIOPinTypeEPI(GPIO_PORTG_BASE, EPI_PORTG_PINS);
        GPIOPinTypeEPI(GPIO_PORTH_BASE, EPI_PORTH_PINS);
        GPIOPinTypeEPI(GPIO_PORTK_BASE, EPI_PORTK_PINS);
        GPIOPinTypeEPI(GPIO_PORTL_BASE, EPI_PORTL_PINS);
        GPIOPinTypeEPI(GPIO_PORTM_BASE, EPI_PORTM_PINS);
        GPIOPinTypeEPI(GPIO_PORTP_BASE, EPI_PORTP_PINS);
        GPIOPinTypeEPI(GPIO_PORTQ_BASE, EPI_PORTQ_PINS);

        EPIModeSet(EPI0_BASE, EPI_MODE_HB8);
     
    //EPIClk = (Divider == 0) ? SysClk : (SysClk / (((Divider / 2) + 1) *2))
        EPIDividerSet(EPI0_BASE, 1);

        EPIConfigHB8Set(EPI0_BASE, EPI_HB8_IN_READY_EN, 200); //maxwait<256

        //WAIT_0:  2EPI clocks,WAIT_1:  4EPI clocks,WAIT_2:  6EPI clocks,  WAIT_3:  8EPI clocks,
        EPIConfigHB8CSSet(EPI0_BASE, 0, EPI_HB8_MODE_ADDEMUX | EPI_HB8_WRWAIT_0 | EPI_HB8_RDWAIT_0 );
        EPIConfigHB8CSSet(EPI0_BASE, 1, 0x01000000);
        EPIAddressMapSet(EPI0_BASE, ( EPI_ADDR_RAM_SIZE_16MB | EPI_ADDR_RAM_BASE_6) );

  • Hello Jian,

    Can you please check what is the FAULT ADDR register value and FAULT STAT register value and report back the same. The init code seems fine.

    Regards
    Amit
  • Hello Amit,
    Sorry , I don't know how to get the values. Can you tell me? Thanks!
  • FAULTSTAT = 0000 0400HFAULTADDR = E000 EDF8Hthanks!
  • Hello Amit,
    I have found ResetISR() and _c_int00() in startup_ccs.c, where can I find the source code of _c_int00() ?
    I think that I define the global arry 'unsigned int eram_data[0x10000]', maybe there is some code in _c_int00() to intiate the array, this will be fault. Because we have not intiate the external sram.

    Regards.
    Li Jian ri
  • Hello Jian,

    The _c_int00 is a precompiled lib file in CCS. What you would need to do is to add a set of macro defined function to enable EPI and configure EPI before the _c_init00 is called.

    Regards
    Amit
  • Hello Amit,
    How to add a set of macro defined function to enable EPI and configure EPI before the _c_init00 is called. Can you give me example? Thanks!

    Regards.
    Li Jian ri
  • Hello Li,

    Attached is a startup file which enables all GPIO. You would need to include the correct header and driver file (I have done the RCGCGPIO as an example).

    //*****************************************************************************
    //
    // startup_ccs.c - Startup code for use with TI's Code Composer Studio.
    //
    // Copyright (c) 2013-2014 Texas Instruments Incorporated.  All rights reserved.
    // Software License Agreement
    // 
    // Texas Instruments (TI) is supplying this software for use solely and
    // exclusively on TI's microcontroller products. The software is owned by
    // TI and/or its suppliers, and is protected under applicable copyright
    // laws. You may not combine this software with "viral" open-source
    // software in order to form a larger program.
    // 
    // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
    // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
    // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
    // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
    // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
    // DAMAGES, FOR ANY REASON WHATSOEVER.
    // 
    // This is part of revision 2.1.0.12573 of the DK-TM4C129X Firmware Package.
    //
    //*****************************************************************************
    
    #include <stdint.h>
    #include "inc/hw_nvic.h"
    #include "inc/hw_types.h"
    #include "inc/hw_sysctl.h"
    
    //*****************************************************************************
    //
    // Forward declaration of the default fault handlers.
    //
    //*****************************************************************************
    void ResetISR(void);
    static void NmiSR(void);
    static void FaultISR(void);
    static void IntDefaultHandler(void);
    
    //*****************************************************************************
    //
    // External declaration for the reset handler that is to be called when the
    // processor is started
    //
    //*****************************************************************************
    extern void _c_int00(void);
    
    //*****************************************************************************
    //
    // Linker variable that marks the top of the stack.
    //
    //*****************************************************************************
    extern uint32_t __STACK_TOP;
    
    //*****************************************************************************
    //
    // The vector table.  Note that the proper constructs must be placed on this to
    // ensure that it ends up at physical address 0x0000.0000 or at the start of
    // the program if located at a start address other than 0.
    //
    //*****************************************************************************
    #pragma DATA_SECTION(g_pfnVectors, ".intvecs")
    void (* const g_pfnVectors[])(void) =
    {
        (void (*)(void))((uint32_t)&__STACK_TOP),
                                                // The initial stack pointer
        ResetISR,                               // The reset handler
        NmiSR,                                  // The NMI handler
        FaultISR,                               // The hard fault handler
        IntDefaultHandler,                      // The MPU fault handler
        IntDefaultHandler,                      // The bus fault handler
        IntDefaultHandler,                      // The usage fault handler
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        0,                                      // Reserved
        IntDefaultHandler,                      // SVCall handler
        IntDefaultHandler,                      // Debug monitor handler
        0,                                      // Reserved
        IntDefaultHandler,                      // The PendSV handler
        IntDefaultHandler,                      // The SysTick handler
        IntDefaultHandler,                      // GPIO Port A
        IntDefaultHandler,                      // GPIO Port B
        IntDefaultHandler,                      // GPIO Port C
        IntDefaultHandler,                      // GPIO Port D
        IntDefaultHandler,                      // GPIO Port E
        IntDefaultHandler,                      // UART0 Rx and Tx
        IntDefaultHandler,                      // UART1 Rx and Tx
        IntDefaultHandler,                      // SSI0 Rx and Tx
        IntDefaultHandler,                      // I2C0 Master and Slave
        IntDefaultHandler,                      // PWM Fault
        IntDefaultHandler,                      // PWM Generator 0
        IntDefaultHandler,                      // PWM Generator 1
        IntDefaultHandler,                      // PWM Generator 2
        IntDefaultHandler,                      // Quadrature Encoder 0
        IntDefaultHandler,                      // ADC Sequence 0
        IntDefaultHandler,                      // ADC Sequence 1
        IntDefaultHandler,                      // ADC Sequence 2
        IntDefaultHandler,                      // ADC Sequence 3
        IntDefaultHandler,                      // Watchdog timer
        IntDefaultHandler,                      // Timer 0 subtimer A
        IntDefaultHandler,                      // Timer 0 subtimer B
        IntDefaultHandler,                      // Timer 1 subtimer A
        IntDefaultHandler,                      // Timer 1 subtimer B
        IntDefaultHandler,                      // Timer 2 subtimer A
        IntDefaultHandler,                      // Timer 2 subtimer B
        IntDefaultHandler,                      // Analog Comparator 0
        IntDefaultHandler,                      // Analog Comparator 1
        IntDefaultHandler,                      // Analog Comparator 2
        IntDefaultHandler,                      // System Control (PLL, OSC, BO)
        IntDefaultHandler,                      // FLASH Control
        IntDefaultHandler,                      // GPIO Port F
        IntDefaultHandler,                      // GPIO Port G
        IntDefaultHandler,                      // GPIO Port H
        IntDefaultHandler,                      // UART2 Rx and Tx
        IntDefaultHandler,                      // SSI1 Rx and Tx
        IntDefaultHandler,                      // Timer 3 subtimer A
        IntDefaultHandler,                      // Timer 3 subtimer B
        IntDefaultHandler,                      // I2C1 Master and Slave
        IntDefaultHandler,                      // CAN0
        IntDefaultHandler,                      // CAN1
        IntDefaultHandler,                      // Ethernet
        IntDefaultHandler,                      // Hibernate
        IntDefaultHandler,                      // USB0
        IntDefaultHandler,                      // PWM Generator 3
        IntDefaultHandler,                      // uDMA Software Transfer
        IntDefaultHandler,                      // uDMA Error
        IntDefaultHandler,                      // ADC1 Sequence 0
        IntDefaultHandler,                      // ADC1 Sequence 1
        IntDefaultHandler,                      // ADC1 Sequence 2
        IntDefaultHandler,                      // ADC1 Sequence 3
        IntDefaultHandler,                      // External Bus Interface 0
        IntDefaultHandler,                      // GPIO Port J
        IntDefaultHandler,                      // GPIO Port K
        IntDefaultHandler,                      // GPIO Port L
        IntDefaultHandler,                      // SSI2 Rx and Tx
        IntDefaultHandler,                      // SSI3 Rx and Tx
        IntDefaultHandler,                      // UART3 Rx and Tx
        IntDefaultHandler,                      // UART4 Rx and Tx
        IntDefaultHandler,                      // UART5 Rx and Tx
        IntDefaultHandler,                      // UART6 Rx and Tx
        IntDefaultHandler,                      // UART7 Rx and Tx
        IntDefaultHandler,                      // I2C2 Master and Slave
        IntDefaultHandler,                      // I2C3 Master and Slave
        IntDefaultHandler,                      // Timer 4 subtimer A
        IntDefaultHandler,                      // Timer 4 subtimer B
        IntDefaultHandler,                      // Timer 5 subtimer A
        IntDefaultHandler,                      // Timer 5 subtimer B
        IntDefaultHandler,                      // FPU
        0,                                      // Reserved
        0,                                      // Reserved
        IntDefaultHandler,                      // I2C4 Master and Slave
        IntDefaultHandler,                      // I2C5 Master and Slave
        IntDefaultHandler,                      // GPIO Port M
        IntDefaultHandler,                      // GPIO Port N
        0,                                      // Reserved
        IntDefaultHandler,                      // Tamper
        IntDefaultHandler,                      // GPIO Port P (Summary or P0)
        IntDefaultHandler,                      // GPIO Port P1
        IntDefaultHandler,                      // GPIO Port P2
        IntDefaultHandler,                      // GPIO Port P3
        IntDefaultHandler,                      // GPIO Port P4
        IntDefaultHandler,                      // GPIO Port P5
        IntDefaultHandler,                      // GPIO Port P6
        IntDefaultHandler,                      // GPIO Port P7
        IntDefaultHandler,                      // GPIO Port Q (Summary or Q0)
        IntDefaultHandler,                      // GPIO Port Q1
        IntDefaultHandler,                      // GPIO Port Q2
        IntDefaultHandler,                      // GPIO Port Q3
        IntDefaultHandler,                      // GPIO Port Q4
        IntDefaultHandler,                      // GPIO Port Q5
        IntDefaultHandler,                      // GPIO Port Q6
        IntDefaultHandler,                      // GPIO Port Q7
        IntDefaultHandler,                      // GPIO Port R
        IntDefaultHandler,                      // GPIO Port S
        IntDefaultHandler,                      // SHA/MD5 0
        IntDefaultHandler,                      // AES 0
        IntDefaultHandler,                      // DES3DES 0
        IntDefaultHandler,                      // LCD Controller 0
        IntDefaultHandler,                      // Timer 6 subtimer A
        IntDefaultHandler,                      // Timer 6 subtimer B
        IntDefaultHandler,                      // Timer 7 subtimer A
        IntDefaultHandler,                      // Timer 7 subtimer B
        IntDefaultHandler,                      // I2C6 Master and Slave
        IntDefaultHandler,                      // I2C7 Master and Slave
        IntDefaultHandler,                      // HIM Scan Matrix Keyboard 0
        IntDefaultHandler,                      // One Wire 0
        IntDefaultHandler,                      // HIM PS/2 0
        IntDefaultHandler,                      // HIM LED Sequencer 0
        IntDefaultHandler,                      // HIM Consumer IR 0
        IntDefaultHandler,                      // I2C8 Master and Slave
        IntDefaultHandler,                      // I2C9 Master and Slave
        IntDefaultHandler                       // GPIO Port T
    };
    
    //*****************************************************************************
    //
    // This is the code that gets called when the processor first starts execution
    // following a reset event.  Only the absolutely necessary set is performed,
    // after which the application supplied entry() routine is called.  Any fancy
    // actions (such as making decisions based on the reset cause register, and
    // resetting the bits in that register) are left solely in the hands of the
    // application.
    //
    //*****************************************************************************
    void
    ResetISR(void)
    {
    	//
    	// ALL GPIOs to be enabled
    	//
    	HWREG(SYSCTL_RCGCGPIO) = 0xFFFFFFFF;
    
        //
        // Jump to the CCS C initialization routine.  This will enable the
        // floating-point unit as well, so that does not need to be done here.
        //
        __asm("    .global _c_int00\n"
              "    b.w     _c_int00");
    }
    
    //*****************************************************************************
    //
    // This is the code that gets called when the processor receives a NMI.  This
    // simply enters an infinite loop, preserving the system state for examination
    // by a debugger.
    //
    //*****************************************************************************
    static void
    NmiSR(void)
    {
        //
        // Enter an infinite loop.
        //
        while(1)
        {
        }
    }
    
    //*****************************************************************************
    //
    // This is the code that gets called when the processor receives a fault
    // interrupt.  This simply enters an infinite loop, preserving the system state
    // for examination by a debugger.
    //
    //*****************************************************************************
    static void
    FaultISR(void)
    {
        //
        // Enter an infinite loop.
        //
        while(1)
        {
        }
    }
    
    //*****************************************************************************
    //
    // This is the code that gets called when the processor receives an unexpected
    // interrupt.  This simply enters an infinite loop, preserving the system state
    // for examination by a debugger.
    //
    //*****************************************************************************
    static void
    IntDefaultHandler(void)
    {
        //
        // Go into an infinite loop.
        //
        while(1)
        {
        }
    }
    

    Regards

    Amit

  • Hello Amit,

         The sram is ok , thank you very much!

         I have another question. I am also developing the epi interface with ET1100 ( an EtherCAT slave). It is slower than sram and need /busy signal. I connect /busy signal to EPIOS32 of TM4C129X. Is the intialization code list above right?  Thanks!

    Best Regards.

    Li Jian ri

  • Hello Jian,

    Yes, the code looks fine from configuration perspective.

    Regards
    Amit