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TM4C1290NCPDT ROM Bootloader: unused peripherals

From the technical documentation, I understand that when the device executes the ROM bootloader, it configures the peripherals UART0, I2C0, SPI0 and USB to be able to receive the flash programming commands. The first peripheral that receives the right start command is used for flash programming while the other three are no more handled by the Boot loader. In this case, a second start command on another peripheral is not received.

I have the following questions:

1)Can you confirm that the device executiong the ROM bootloader works as above described?

2)In my application, I plan to use some of the pins associated to the peripherals used by the boot loader for custom purposes. What happens if that signals have a logic level different from the expected one (for example if UART RX is at low logic level instead of high logic level)?

3)What happens if the logic level of that signals changes during the execution of the ROM Boot loader? Changes that are not interpreted as a valid command are ignored? Logic level transitions that occurs on the signals of the peripherals not used for flash programming (for example a transition of UART RX signal during USB flash programming) are ignored?

Best regards.

Daniele

  • Hello Daniele,

    1. Yes. The ROM Boot loader would be polling the interfaces.
    2-3. As for having one of the functional pins in a logic level other than what is expected by the boot loader must not affect the function as long as the level is maintained in the same state while the device is powered. Once the boot loader is active and a pin level changes may cause the ROM Boot loader to lock on to a peripheral

    Regards
    Amit
  • Hello Amit,
    thank you very much for the response. Everything's clear.

    Regards.
    Daniele