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RM57: Questions about HL_system.c getResetSource()

Other Parts Discussed in Thread: RM57L843, HALCOGEN

Hi all,


I have been comparing the HALCoGen reset code against the RM57L843 documentation and found some discrepancies.  I am wondering if you can explain whether these are HALCoGen problems or if I am just not understanding something.


This code was generated by HALCoGen 04.05.02 for the Hercules RM57L843.


Question 1: HL_system.h provides the following enum of reset sources:

typedef enum
{
    POWERON_RESET       = 0x8000U,  /**< Alias for Power On Reset     */
    OSC_FAILURE_RESET   = 0x4000U,  /**< Alias for Osc Failure Reset  */
    WATCHDOG_RESET      = 0x2000U,  /**< Alias for Watch Dog Reset    */
    WATCHDOG2_RESET     = 0x1000U,  /**< Alias for Watch Dog 2 Reset  */
    DEBUG_RESET         = 0x0800U,  /**< Alias for Debug Reset        */
    INTERCONNECT_RESET  = 0x0080U,  /**< Alias for Interconnect Reset */
    CPU1_RESET          = 0x0040U,  /**< Alias for CPU 1 Reset        */
    CPU0_RESET          = 0x0020U,  /**< Alias for CPU 0 Reset        */
    SW_RESET            = 0x0010U,  /**< Alias for Software Reset     */
    EXT_RESET           = 0x0008U,  /**< Alias for External Reset     */
    NO_RESET            = 0x0000U   /**< Alias for No Reset           */    
}resetSource_t;

This matches the SYSESR table in spnu562, 2.5.1.46, with one key difference:  spnu562 marks bit 6  as "reserved", while HL_system.c marks it as "CPU1_RESET".  Which is correct?


Question 2: HL_system.c provides a getResetSource() function, containing a large if-else that looks like it should have cases for each possible resetSource_t.  However, it does not - it is missing a handler for INTERCONNECT_RESET.  This falls through to the "else" and is treated as NO_RESET.  Is this behavior deliberate?

resetSource_t getResetSource(void)
{
    register resetSource_t rst_source;
...


Question 3: HL_sys_startup.c contains a switch statement that branches on getResetSource().  Like HL_system.c, it is missing a case for INTERCONNECT_RESET, but on top of that, it is also missing a case for WATCHDOG2_RESET.  (This falls through to the "default", which does nothing).  Is this behavior deliberate?

    switch(getResetSource())
    {
        case POWERON_RESET:
        ...


Thanks for any insight,
Peter

  • Question1: device family is designed for both lockstep and dual-core (not locked). The RM57L843 only supports single core mode (lockstep) but the header is sort of preparing for an unlocked device. no plans to release an unlocked device at this time though. anyway just ignore this and treat CPU1 reset as reserved.

    Question 2 & 3: Yes I expect there are issues. HalCoGen for the RM57L843 is also still in 'beta' and the interconnect reset is a new feature on the 843. Thank you for pointing this out.

    I'll file a CQ ticket to track these issues: SDOCM00122181
    We have similar issues in the initialization code that goes w. the Safety Lib and at the moment the startup application report that we have for the other RM4x devices isn't available for the RM57 so these are some gaps to plug before this device is fully in production.
  • Thanks, Anthony. This answers my questions.