RM48L952: How to read Thermal Resistance Characteristics fro ZWT Package

Christian,

Christian Herget said:

Am I right that this means that we differ from the JEDEC recommended 2S2P test board in that we used this via cluster and GND plane to improve the thermal characteristics?

yes the modeling was done with the JEDEC 2S2P small board, and also done with that board + the 5x5 array of 300um diameter 35um plate thickness vias in the center added.  The via array improves performance by about 25% and is also reasonable because the center array is almost all GND, so that is the configuration we chose to publish in the datasheet.

Christian Herget said:

Do we have any recommendations how to design a PCB with respect to the thermal performance of the ZWT package / Hercules device?

Nothing unique to Hercules.

Christian Herget said:

Can ALL the NC pins of the RM48L952ZWT be used to enhance their thermal performance, e.g. connect them to the GND plane?

Be careful about any pins that are specified in the terminal functions table as 'should be unconnected'.  but the NC pins listed in table 4-42 of SPNS162C for example say that they may be connected to GND:

"No Connects. These balls are not connected to any internal logic and can be connected to the PCB ground without affecting the functionality of the device."

On the other hand this choice would impact migration up to a TMS570LC4357 where these balls are used for other functions.

So if there is a chance that a TMS570LC4357 may be used in the same PCB you need to weigh that against any benefit in thermal performance.

We can't provide support unfortunately for modeling all these scenarios so it would be up to the customer to conduct the experiments with/without these balls in order to get an idea of the difference it would make.

-Anthony