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What is the I/O Pin Structure for MibSPI pins when configured as GPIO Pins?

Hello,

When I configure the MibSPI Pins as GPIO using PC0 Register, what should be the values for PC6, PC7 and PC8 Register?

I know that the answer to this question depends on the external electrical circuit.

But I could not find any PICTURE or BLOCK DIAGRAM describing the internal structure of the MibSPI Pins when it is in GPIO Mode.

Can you please provide me with some BLOCK DIAGRAM for the I/O Pin Structure for MibSPI?

Any information will help me to understand better than what is provided in the TRM.

Thank you.

Regards

Pashan

 

  • Hi Pashan,

    I have forwarded your query to our expert team member, will get back to you asap

    Regards

    Hari

  • Hi Pashan,

    Below diagram and Table should provide a basic understanding of the GPIO functionality.

    Best Regards
    Prathap

  • Hello Prathap,

    Can you please let me know the Page Number of TRM where I can find the above mentioned Picture?

    I searched with all the possible keywords, but I am unable to find out.

    Thank you.

    Regards

    Pashan

     

  • Hi Pashan

    All the module IO pins have similar behavor when they are configured as GIO pins. Please see

    Figure 12-6. GIO Block Diagram (pp408)

    and

    Table 12-1. Input Buffer, Output Buffer, and Pull Control Behavior as GPIO Pins (pp410)

    for pin function descriptions.

     

     

     

    Best Regards
    Prathap