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TMS570LC4357: VIM RAM vector table accessed in index managed interrupt mode leading to VIM Compare Error (ESM 2.25)

Franck WARTEL
Intellectual 450 points
Part Number: TMS570LC4357

Hello,

TRM SPNU563A dated  March 2018 specifies in chapter §19.5.3 that 

Initialization of VIM RAM vector table is only needed in case vectored interrupts are used, and that index interrupt management does not need the table to be initialized.

Based on the TRM and as we planned to use irq index interrupts mode (SCTRL.VE=0) we skipped the RAM VIM init on purpose, and faced a lockstep VIM Bus compare error (ESM 2.25)  on first  unmasked irq occurence (RTI compare for the first real time tick in our case).

After analysis I noticed that even in case System Control Register SCTLR.VE bit is set to zero, the table is still accessed to update IRQVECREG and FIQVECREG alongside IRQINDEX, which could explain the compare error as VIM RAM table is in unknown state after power on.

It seems to me that  register vectored mode is activated in case SCTLR.VE is set to zero, thus leading to access to VIM RAM table to update xxxVECREG regisgters.

Can you please confirm that VIM RAM shall be initialized unconditionnaly to avoid VIM bus compare errors ?

If confirmed the followinglocations might require an update : SPNU563A end of §19.4.2 and §19.5.3

Thanks for your support,

Regards,


Franck.

  • 0
    TI__Guru**** 197306 points
    Hello Franck,

    VE=0 is just to disable the hardware vectored interrupts (IRQ only), it doesn't disable register vectored interrupts. Before enabling the vectored interrupts (Register vectored interrupts, or Hardware vectored interrupts), the application software also has to initiate the interrupt vector table (VIM RAM).
  • 0 in reply to QJ Wang
    Intellectual 450 points

    Hi QJ,

    I am not sure to understand your answer and how to enable the register vectored interrupts.

    It seems to me that either we are in { irq index + register vectored interrupts mode } in case SCTRL.VE = 0  or hardware vectored interrupts in case SCTLR.VE=1, and  that means that vector table is always used and that RAM VIM shall be initialized unconditionally.

    Can you please clarify? In case I set SCTLR.VE to 0, do I need to initialize VIM RAM vector table ?

    Thanks,

    Franck

  • 0 in reply to Franck WARTEL
    TI__Guru**** 197306 points
    Hi Franck,

    There is no register to enable and disable the register vectored interrupts. My understanding is that if the vectored interrupts are not used in the application and the ECC for VIM RAM is not enabled, the VIM RAM initialization is not required.
  • 0 in reply to QJ Wang
    Intellectual 450 points

    Hi QJ,

    As explained in the initial post not initializing the RAM VIM while staying in index interrupt mode (STLR.VE = 0)  without initializing VIM RAM leads to lockstep VIM compare error.

    I confirmed by tests that what I observe on target is not what we both understand from the TRM, as even in case System Control Register SCTLR.VE bit is set to zero register vectored interrupt mode is active and the table is still accessed to update IRQVECREG and FIQVECREG (confirmed by tests on target with dummy values in RAM table) alongside IRQINDEX, which could explain the compare error as VIM RAM tables is in unknown state after power on.

    Can you please clarify with design team ?

    Thanks for your support,

    Franck 

  • 0 in reply to Franck WARTEL
    TI__Guru**** 197306 points
    Hi Franck,

    I will do a test, then clarify with design team. Thanks
  • 0 in reply to QJ Wang
    TI__Guru**** 197306 points
    Hi Franck,

    I did a simple test with index mode. I didn't initialize the VIM RAM, and didn't see the ESM 2.25 error using RTI interrupt.

    This is the code used for test:
    sys_intvecs.asm:
    //irq and fiq
    b _irqDispatch
    b _fiqDispatch

    void _irqDispatch(void)
    {
    uint16 vec;
    vec = vimREG->IRQINDEX;
    switch(vec)
    {
    case (3): //rtiCompare0
    rtiREG1->INTFLAG = 1U;
    rtiNotification(rtiREG1,rtiNOTIFICATION_COMPARE0);
    // rtiCompare0Interrupt();
    vec = 0;
    break;
    default:
    break;
    }
    }

    I could not reproduce the issue. I will do more test later.
  • 0 in reply to QJ Wang
    TI__Guru**** 197306 points

    Hi Franck,

    Checked with design guy, and confirmed that the inputs to VIM comparator are the addresses from 2 VIM RAMs. Even the VIC is disabled (from CPU side), the addresses are still fed into comparator. In order to avoid failure due to the random state in which VIM RAM powers up, the VIM RAM has to be initialized.

    I will submit a request to remove the sentence  from the TRM:

    "This initialization is only required when vectored interrupts are used, index interrupt management does not need the table to be initialized."

    Thank you!

  • 0 in reply to QJ Wang
    Intellectual 450 points

    Hi QJ,

    Thanks for the investigation and the confirmation that I shall initialize the VIM RAM.

    Best Regards,

    Franck.