This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Hi,
I have a question from my customer regarding below TRM description.
At section 24.17.8 Auto-Bus-On Time Register (DCAN ABOTR) in SPNU499B, there is a NOTE saying;
On write access to the CAN Control register while Auto-Bus-On timer is running, the Auto-Bus-On procedure will be aborted.
I understood Auto-Bus-On feature is aborted if above case happens.
What is an expected recovery sequence from this situation in customer code?
Thanks and regards,
KoT
Hi QJ,
So, customer needs to manually set Init bit once, then reset Init bit afterward ?
In this case, CPU needs to know when Auto-Bus-On procedure is aboarted by register access.
Is this nortified to CPU?
Thanks and regards,
KoT
Hi QJ,
I see.
So CPU should periodically check BOff bit in DCAN ES resister, then if the module stays in Bus-Off state too long,
CPU needs to try the recovery sequence (manually set Init bit then reset it).
Is this correct?
Thanks and regards,
KoT