CCS/TM4C1294KCPDT: Settind DMA interrupt for ping-pong mode ADC0 operation

Tool/software: Code Composer Studio

I am working with EK - TM4C1294XL.  I need to take ADC data as fast as possible and for this reason I am using DMA with  ping-pong mode.

In data sheet on Tiva™ TM4C1294NCPDT Microcontroller on page 685 (9.2.6.4 Pig-Pong ) there is the following phrase:

"When the transfer using the primary control structure is complete,
the μDMA controller reads the alternate control structure for that channel to continue the transfer.
Each time this happens, an interrupt is generated, and the processor can reload the control structure
for the just-completed transfer. "

So, based on this phrase I want to register interrupt which must be generated when DMA transfer is competed.

In documentation on "TivaWare™ Peripheral Driver Library"   on page 605 (31.2.3.24 uDMAIntRegister) there is the following

phrase:   "The interrupt handler for the uDMA is for transfer completion when the channel
UDMA_CHANNEL_SW is used and for error interrupts."

So, the question is :  is really possible to register DMA interrupt for ADC0 channel  оr not.

I know that it is possible to use ADC interrupts to manage DMA, but I requires too much CPU utilization

because such interrupts are very fast and I want to operate ADC at 1 - 2 MSPS.

If interrupt can arise once per one of ping-buffer  DMA  buffer is filled  it could require much less CPU utilization for interrupt processing.

Best regards,

Petr Storozhev