TMS570LC4357: DMA with ADC in continuous mode

Hi Sunil,

Thanks for the reply. We are trying do to sinusoidal amplitude demodulation on up to 25 inputs at 8KHz every 2ms or so. Do you have any recommendations for ADC/DMA configuration for oversampling these signals?

Thanks,

Jeremy

Hi Sunil,

An example would be great! That configuration sounds like it should work.

Thanks,

Jeremy

Hi Sunil, 

I want to use the PWM (instead of the RTI) to trigger the SOC on the 2 ADC groups (one on rising edge and one on falling edge). If I use EPWM_B as the trigger for both ADC groups, how can I control the SOC_B pulse width? The PWM event-trigger submodule allows me to select an SOC B event trigger, but that just determines when the SOC B pulse will be generated. I don't see how the pulse width is determined, the falling edge time is important in this case since it would be the trigger for the other ADC group.

If the pulse width for SOC events is not configurable, then I think I can work around it by using 2 different SOC triggers, EPWM_B and EPWM_A1 for example, with different event trigger selections.

Actually both the groups were triggered by the falling edge of ePWM1B in the above scope shot, so the 50 conversions are stacked back-to-back.

Regards, Sunil

Thanks Sunil,

In your example above, I would like to trigger group 1 on the rising edge and group 2 on the falling edge of the PWM signal. Is that possible with the PWM SOC pulse? or would I have to use a HW trigger and connect the PWM output pin to the ADC SOC pin?

I need a constant time between the start of conversion of each ADC group.

Jeremy,

Yes, this is easy to set up as well. The ePWM SOCx signals are different from the normal PWM outputs, so you cannot use both edges of this signal to trigger two separate ADC groups with configurable timing. Instead, you can use SOCA to trigger one group and SOCB to trigger another group. I will try this tomorrow and let you know.

Regards, Sunil

Hi Sunil,

Are you able to attach your user code that generated the scope plot above with your attached halcogen project? My coworker and I are encountering some issues with our implementation. Our DMA buffers are sometimes filled with junk/offset data from the sinusoidal ADC input, other times the data looks correct. We are using a PWM of 30KHz and triggering the 25 channel samples on each edge using SOC A1 and SOC B to trigger ADC groups 1 and 2 respectively (we are not using the event group like your halcogen project). We are unable to see the AD1_EXT_ENA pin output, even though we have set the IOMM settings for pin G16 and V8 to the AD1_EXT_ENA setting.