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TMS320F28388D: TMS320F28388D: MCAN Interrupt

Part Number: TMS320F28388D

Hi TI , 

I wanted to know if you had any way of artificially recreating the following error scenarios mentioned in MCAN_IR  ?

  • Access to Reserved Address
  • Protocol Error in Data Phase
  • Bit Error Uncorrected
  • Transmission Cancellation Finished
  • Message RAM Access Failure

Thanks

Abhishek

  • Abhishek,

    Please find my answers below:

    • Access to Reserved Address
      • If the MCAN core tries to write into a reserved address, this error can be generated.
    • Protocol Error in Data Phase
      • Any protocol error can be used to trigger this error. The simplest would be to generated an ACK error by not connecting any receiving node and the core would generate this error since there will be no ACK.
    • Bit Error Uncorrected
      • You can generate this error using the force ECC error in the message RAM using the McanaErrRegs.MCANERR_CTRL. register
    • Transmission Cancellation Finished
      • This condition can be generated by initiating a cancellation of a requested Transmission using the MCAN_REGS.MCAN_TXBCR register.
    • Message RAM Access Failure
      • The way to generate this failure is capture in detail in the description of this field. It is a bit tricky to generate this condition intentionally.

    Regards,
    Praveen

  • Hi Praveen ,

    Thanks for your suggestions , i have few more doubts 

    • Transmission Cancellation Finished , On Writes to MCAN_REGS.MCAN_TXBCR would in cancellation of pending bits in  MCAN_TXBRP  register but  bit would not result in setting of TCF bit in MCAN_IR.TCF register.
    • Protocol Error in Data Phase ,  On not connecting any receiving node i am observing Arbitration Protocol error but not Protocol Error in Data Phase anything that i can try for Protocol Error in Data Phase ?
    • Bit Error Uncorrected , Do you have an sample code for accessing MCANERR_CTRL through MCANERR_VECTOR as what values to be written into ECC_VECTOR field, together with the RD_SVBUS trigger and RD_SVBUS_ADDRESS is not clear to me from the TRM.
    • Also Observe Error Passive bit fields in MCAN_IR are set even when MCAN_ECR.REC and MCAN_ECR.TEC bit field counts are below 96 when trying to transmit CAN message with no receiving node.

    Thanks

    Abhishek

  • Abhishek,

    Please find my answers below:

    Transmission Cancellation Finished , On Writes to MCAN_REGS.MCAN_TXBCR would in cancellation of pending bits in  MCAN_TXBRP  register but  bit would not result in setting of TCF bit in MCAN_IR.TCF register.

    Have you  enabled the corresponding bit in MCAN_TXBCIE register? For the MCAN_IR to be set, this register has to be enabled

    Protocol Error in Data Phase ,  On not connecting any receiving node i am observing Arbitration Protocol error but not Protocol Error in Data Phase anything that i can try for Protocol Error in Data Phase ?

    Generating an error in the data phase is not very straight forward. However you can refer to this App note. This was built for DCAN, but can be used for MCAN as well while operating in classic mode.

    I will get back to you on the other two questions tomorrow.

    Regards,
    Praveen

  • Bit Error Uncorrected , Do you have an sample code for accessing MCANERR_CTRL through MCANERR_VECTOR as what values to be written into ECC_VECTOR field, together with the RD_SVBUS trigger and RD_SVBUS_ADDRESS is not clear to me from the TRM.

    Please follow the below steps to generate an ECC error:

    1. disable the ECC
    2. Change the bits (flip 1 bit for introducing corrected error and 2 bits for uncorrected error) in the MCAN message RAM address where you would want to introduce the ECC error
    3. Enable the ECC
    4. Perform read to the address and it should generate the ECC error

    You can use the MCAN_eccConfig function in the driverlib to enable/disable ECC.