TMDSCNCD28379D: Program will not fit into available memory; modifying Linker file

mike buba

Part Number: TMDSCNCD28379D
Other Parts Discussed in Thread: C2000WARE

Hi,

when trying External mode in MATLAB Simulink for TMDSCNCD28379D for CPU2 (Boot from Flash), I am already running a different application on CPU1 (Boot from Flash), I am getting an error saying "program will not fit into available memory"

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<Linking> 
warning: build attribute vendor section TI missing in 
   "C:/ProgramData/MATLAB/SupportPackages/R2018a/toolbox/target/supportpackages 
   /tic2000/rtlib/IQmath_fpu32.lib<IQ10div.obj>": compatibility cannot be 
   determined 
warning: build attribute vendor section TI missing in 
   "C:/ProgramData/MATLAB/SupportPackages/R2018a/toolbox/target/supportpackages 
   /tic2000/rtlib/IQmath_fpu32.lib<IQmathTables.obj>": compatibility cannot be 
   determined 
"C:/ProgramData/MATLAB/SupportPackages/R2018a/toolbox/target/supportpackages/tic2000/src/c28377D.cmd", line 131: error:  
   program will not fit into available memory.  run placement with 
   alignment/blocking fails for section ".ebss" size 0x8e7 page 1.  Available 
   memory ranges: 
   RAMLS_DATA   size: 0x2000       unused: 0x0          max hole: 0x0 
   RAMD1        size: 0x800        unused: 0x0          max hole: 0x0        
error: errors encountered during linking; "../Inverter_003.out" not built 
 
>> Compilation failure 
gmake: *** [../Inverter_003.out] Error 1 
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

<Linking> 
warning: build attribute vendor section TI missing in 
   "C:/ProgramData/MATLAB/SupportPackages/R2018a/toolbox/target/supportpackages 
   /tic2000/rtlib/IQmath_fpu32.lib<IQ10div.obj>": compatibility cannot be 
   determined 
warning: build attribute vendor section TI missing in 
   "C:/ProgramData/MATLAB/SupportPackages/R2018a/toolbox/target/supportpackages 
   /tic2000/rtlib/IQmath_fpu32.lib<IQmathTables.obj>": compatibility cannot be 
   determined 
"C:/ProgramData/MATLAB/SupportPackages/R2018a/toolbox/target/supportpackages/tic2000/src/c28377D.cmd", line 131: error:  
   program will not fit into available memory.  run placement with 
   alignment/blocking fails for section ".ebss" size 0x8e7 page 1.  Available 
   memory ranges: 
   RAMLS_DATA   size: 0x2000       unused: 0x0          max hole: 0x0 
   RAMD1        size: 0x800        unused: 0x0          max hole: 0x0        
error: errors encountered during linking; "../Inverter_003.out" not built 
 
>> Compilation failure 
gmake: *** [../Inverter_003.out] Error 1

The main part says:

RAMLS_DATA size: 0x2000 unused: 0x0 max hole: 0x0
RAMD1 size: 0x800 unused: 0x0 max hole: 0x0

This reply advises going into the Linker file and adding more sections to the heap area.

When I go to the Linker file C:\ProgramData\MATLAB\SupportPackages\R2018a\toolbox\target\supportpackages\tic2000\src\c28377D.cmd

Q1. I do not see .sysmem, only .esysmem. Is this a problem?

.esysmem : > RAMLS_DATA, PAGE = 1

Q2. There is only #ifdef CPU1 for CPU1 and not CPU2. Is this a problem?

Q3. I do not see available memory to add as OR ("|") in the linker file, only RAMLS_DATA. Should I modify RAMLS_DATA? Full Linker file is sjown below

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#ifdef CLA_BLOCK_INCLUDED
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are. 
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_BLOCK_INCLUDED
MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN            : origin = 0x000000, length = 0x000002
   BEGIN_FLASH      : origin = 0x080000, length = 0x000002
   #ifdef CPU1
       RAMM0            : origin = 0x000122, length = 0x0002DE
   #else
       RAMM0            : origin = 0x000080, length = 0x000380
   #endif
   RAMD0            : origin = 0x00B000, length = 0x000800
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

#ifdef CLA_BLOCK_INCLUDED
// Define a size for the CLA scratchpad area that will be used
// by the CLA compiler for local symbols and temps
// Also force references to the special symbols that mark the
// scratchpad are. 
CLA_SCRATCHPAD_SIZE = 0x100;
--undef_sym=__cla_scratchpad_end
--undef_sym=__cla_scratchpad_start
#endif //CLA_BLOCK_INCLUDED
MEMORY
{
PAGE 0 :
   /* BEGIN is used for the "boot to SARAM" bootloader mode   */
   BEGIN           	: origin = 0x000000, length = 0x000002
   BEGIN_FLASH     	: origin = 0x080000, length = 0x000002
   #ifdef CPU1
       RAMM0           	: origin = 0x000122, length = 0x0002DE
   #else
       RAMM0           	: origin = 0x000080, length = 0x000380
   #endif
   RAMD0           	: origin = 0x00B000, length = 0x000800
   #ifdef CLA_BLOCK_INCLUDED
        RAMLS_PROG      	: origin = 0x00A000, length = 0x000800
        RAMLS_CLA_PROG      : origin = 0x00A800, length = 0x000800
   #else
        RAMLS_PROG      	: origin = 0x009000, length = 0x002000
   #endif //CLA_BLOCK_INCLUDED
   #ifdef CPU1       
       #if BOOT_FROM_FLASH
            RAMGS_PROG       : origin = 0x017000, length = 0x001000
       #else
            RAMGS_PROG       : origin = 0x014000, length = 0x004000
       #endif
   #endif

   RESET           	: origin = 0x3FFFC0, length = 0x000002
   /* Flash sectors */
   FLASHA_N           : origin = 0x080002, length = 0x03FFFE	/* on-chip Flash */ 

PAGE 1 :
   #ifdef CPU1
       BOOT_RSVD       : origin = 0x000002, length = 0x000120     /* Part of M0, BOOT rom will use this for stack */
   #else
       BOOT_RSVD       : origin = 0x000002, length = 0x00007E     /* Part of M0, BOOT rom will use this for stack */
   #endif
   RAMM1           : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
   RAMD1           : origin = 0x00B800, length = 0x000800
   #ifdef CLA_BLOCK_INCLUDED
        RAMLS_CLA_DATA      : origin = 0x008000, length = 0x001000
        RAMLS_DATA          : origin = 0x009000, length = 0x002000
   #else
        RAMLS_DATA          : origin = 0x008000, length = 0x002000
   #endif //CLA_BLOCK_INCLUDED
#ifdef CPU1       
       #if BOOT_FROM_FLASH
            RAMGS_DATA       : origin = 0x00E000, length = 0x00B000
       #else
            RAMGS_DATA       : origin = 0x00E000, length = 0x008000
       #endif
#endif
   RAMGS_IPCBuffCPU1   : origin = 0x00C000, length = 0x001000
   RAMGS_IPCBuffCPU2   : origin = 0x00D000, length = 0x001000 

   CLA1_MSGRAMLOW   : origin = 0x001480, length = 0x000080
   CLA1_MSGRAMHIGH  : origin = 0x001500, length = 0x000080

   CPU2TOCPU1RAM   : origin = 0x03F800, length = 0x000400
   CPU1TOCPU2RAM   : origin = 0x03FC00, length = 0x000400
}


SECTIONS
{
#if BOOT_FROM_FLASH
   /* Allocate program areas: */
   .cinit              : > FLASHA_N      PAGE = 0, ALIGN(4)
   .pinit              : > FLASHA_N,     PAGE = 0, ALIGN(4)
   .text               : > FLASHA_N      PAGE = 0, ALIGN(4)
   codestart           : > BEGIN_FLASH       PAGE = 0, ALIGN(4)
   ramfuncs            : LOAD = FLASHA_N,
                         RUN = RAMLS_PROG,
                         LOAD_START(_RamfuncsLoadStart),
                         LOAD_SIZE(_RamfuncsLoadSize),
                         LOAD_END(_RamfuncsLoadEnd),
                         RUN_START(_RamfuncsRunStart),
                         RUN_SIZE(_RamfuncsRunSize),
                         RUN_END(_RamfuncsRunEnd),
                         PAGE = 0, ALIGN(4)
   /* Initalized sections go in Flash */
   .econst             : > FLASHA_N      PAGE = 0, ALIGN(4)
   .switch             : > FLASHA_N      PAGE = 0, ALIGN(4)
   /* Allocate IQmath areas: */
   IQmath			: > FLASHA_N, PAGE = 0, ALIGN(4)            /* Math Code */
   IQmathTables		: > FLASHA_N, PAGE = 0, ALIGN(4)
   
   #ifdef CLA_BLOCK_INCLUDED
       /* CLA specific sections */
       Cla1Prog         : LOAD = FLASHA_N,
                          RUN = RAMLS_CLA_PROG,
                          LOAD_START(_Cla1funcsLoadStart),
                          LOAD_END(_Cla1funcsLoadEnd),
                          RUN_START(_Cla1funcsRunStart),
                          LOAD_SIZE(_Cla1funcsLoadSize),
                          PAGE = 0, ALIGN(4)
   #endif //CLA_BLOCK_INCLUDED
#else
   codestart        : > BEGIN,     PAGE = 0
   ramfuncs         : > RAMM0      PAGE = 0
   #ifdef CPU1
       .text            : >>RAMM0 | RAMD0 | RAMLS_PROG | RAMGS_PROG,   PAGE = 0
   #else
       .text            : >>RAMM0 | RAMD0 | RAMLS_PROG,   PAGE = 0
   #endif
   .cinit           : > RAMM0 | RAMD0 | RAMLS_PROG | RAMGS_PROG,   PAGE = 0
   .pinit           : > RAMM0,     PAGE = 0
   .switch          : > RAMM0,     PAGE = 0
   .econst          : > RAMLS_DATA,    PAGE = 1
   /* Allocate IQ math areas: */
   IQmath			: > RAMLS_PROG,     PAGE = 0            /* Math Code */
   IQmathTables		: > RAMLS_PROG, PAGE = 0

   #ifdef CLA_BLOCK_INCLUDED
       /* CLA specific sections */
       Cla1Prog         : > RAMLS_CLA_PROG, PAGE=0
   #endif //CLA_BLOCK_INCLUDED
#endif
   .stack           : > RAMM1,     PAGE = 1
   #ifdef CPU1
       .ebss            : >> RAMLS_DATA| RAMD1 | RAMGS_DATA ,    PAGE = 1
   #else
       .ebss            : >> RAMLS_DATA| RAMD1,    PAGE = 1
   #endif
   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used, */
   .esysmem         : > RAMLS_DATA,    PAGE = 1
   
   #ifdef CLA_BLOCK_INCLUDED
       /* CLA C compiler sections */
       //
       // Must be allocated to memory the CLA has write access to
       //
       Cla1DataRam0		: > RAMLS_CLA_DATA, PAGE=1

       Cla1ToCpuMsgRAM  : > CLA1_MSGRAMLOW,   PAGE = 1
       CpuToCla1MsgRAM  : > CLA1_MSGRAMHIGH,  PAGE = 1
       CLAscratch       :
                         { *.obj(CLAscratch)
                         . += CLA_SCRATCHPAD_SIZE;
                         *.obj(CLAscratch_end) } >  RAMLS_CLA_DATA,  PAGE = 1

       .scratchpad      : > RAMLS_CLA_DATA,       PAGE = 1
       .bss_cla		    : > RAMLS_CLA_DATA,       PAGE = 1
       .const_cla	    :  LOAD = FLASHA_N,
                           RUN = RAMLS_CLA_DATA,
                           RUN_START(_Cla1ConstRunStart),
                           LOAD_START(_Cla1ConstLoadStart),
                           LOAD_SIZE(_Cla1ConstLoadSize),
                           PAGE = 1
   #endif //CLA_BLOCK_INCLUDED
   #ifdef CPU1  
       /* The following section definitions are required when using the IPC API Drivers */ 
        GROUP : > CPU1TOCPU2RAM, PAGE = 1 
        {
            PUTBUFFER 
            PUTWRITEIDX 
            GETREADIDX 
            WRITEFLAG1CPU1
	    WRITEFLAG2CPU1
            READFLAG1CPU1
            READFLAG2CPU1
        }
        GROUP : > CPU2TOCPU1RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
            WRITEFLAG1CPU2: TYPE = DSECT
            WRITEFLAG2CPU2: TYPE = DSECT
            READFLAG1CPU2:  TYPE = DSECT
            READFLAG2CPU2:  TYPE = DSECT
        }

   #else
       /* The following section definitions are required when using the IPC API Drivers */ 
        GROUP : > CPU2TOCPU1RAM, PAGE = 1 
        {
            PUTBUFFER 
            PUTWRITEIDX 
            GETREADIDX 
            WRITEFLAG1CPU2
            WRITEFLAG2CPU2
            READFLAG1CPU2			
            READFLAG2CPU2			
        }
        GROUP : > CPU1TOCPU2RAM, PAGE = 1
        {
            GETBUFFER :    TYPE = DSECT
            GETWRITEIDX :  TYPE = DSECT
            PUTREADIDX :   TYPE = DSECT
            WRITEFLAG1CPU1: TYPE = DSECT
            WRITEFLAG2CPU1: TYPE = DSECT
            READFLAG1CPU1 : TYPE = DSECT
            READFLAG2CPU1 : TYPE = DSECT
        }
   #endif 
        GROUP : > RAMGS_IPCBuffCPU1, PAGE = 1 
        {
            CPU1TOCPU2GSRAM
        }
        GROUP : > RAMGS_IPCBuffCPU2, PAGE = 1 
        {
            CPU2TOCPU1GSRAM
        }
}

/*
//===========================================================================
// End of file.
//===========================================================================
*/

I asked a similar question several months ago as I was having the same error ("program will not fit into available memory") and I assumed increasing the heap size from the MATLAB Simulink will solve the problem. It did, temporarily, but now I am still having the same issue.

over 3 years ago

0 Santosh Jha over 3 years ago

TI__Guru 50511 points

Hi,

mike buba said:
Q1. I do not see .sysmem, only .esysmem. Is this a problem?

.esysmem : > RAMLS_DATA, PAGE = 1

Looks like you are using COFF format, so .esysmem is equivalent section.

mike buba said:
Q2. There is only #ifdef CPU1 for CPU1 and not CPU2. Is this a problem?

This should not be any issue. If not CPU1 block for CPU2.

mike buba said:
I do not see available memory to add as OR ("|") in the linker file, only RAMLS_DATA. Should I modify RAMLS_DATA?

Do you have CLA_BLOCK_INCLUDED ? If not then you may be able include RAMLS_DATA little bit.

is this linker file came with Simulink project or you created for your project?

0 mike buba over 3 years ago in reply to Santosh Jha

Intellectual 460 points

Hi Santosh,

the linker file came with the Simulink Support Package for C2000 installation from the MATLAB website. I do not see F28379D (processor which I am using) so the 'closest' is c28377D.cmd. In the Simulink I have set the linker command file path to that file. Is there a specific linker file for F28379D available to download?

There is a CLA_BLOCK_INCLUDED, line #136 in my first message showing the full linker file.

Line #50 and #52 in linker file say

RAMLS_DATA : origin = 0x009000, length = 0x002000 (#50)

RAMLS_DATA : origin = 0x008000, length = 0x002000 (#52)

would a solution be to increase the lenght? Can this be done? To how much?

For the F28377D (which is similar to the F28379D processor) it says there is "128KB of GSx RAMs (16 blocks of 8KB)". Now sure how to convert length 0x002000 to KB and check if I still have a space left.

MATLAB Simulink report says

RAMLS_DATA size: 0x2000 unused: 0x0

meaning, all 2000 is used.

0 mike buba over 3 years ago in reply to Santosh Jha

Intellectual 460 points

Hi Santosh,

New update. When I load the application (e.g. Machine Side App) on CPU1 in External mode for testing and parameter tuning and another already tested (e.g. Network Side App) on the CPU2 (not in External mode), I am not getting an error.

But, I get a different problem. I do not see any change in the application: my ADCs are zero although there is a 1.5 Vdc input (offset for AC signals to accomodate unipolar ADC input) and GPIO toggle signal I have to verify the sample time (10 kHz) is always HIGH.

I used F28335 before and was able to run a similar code (Network and Machine App on one CPU -- F28335 has only one CPU). F28379D has two CPUs and more memory.

Would increasing RAM length help and can I add more RAM locations? Am I on the right track?

When I do OR between all RAMs, I get 0x002200 + 0x000800 + 0x004000 which is 0x007000 bites, compared to 1024 KB of memory F28739D has... am I correctly adding all this?

.esysmem : > RAMLS_DATA | RAMD1 | RAMGS_DATA

0 Santosh Jha over 3 years ago in reply to mike buba

TI__Guru 50511 points

Mike,

I am not familiar with these App, so we will need help from MathWorks team. I will reach out to MW team to help us here.

0 mike buba over 3 years ago in reply to Santosh Jha

Intellectual 460 points

No, no, Sorry if I added a level of confusion here. They are my bespoke Simulink applications to control network (loaded onto CPU1) and machine (loaded onto CPU2) converter. Each has an ADC section, scaling and filtering, dual-loop control and PWM blocks.

NWandMCApp.zip

0 mike buba over 3 years ago in reply to Santosh Jha

Intellectual 460 points

I have modified the ADC block slightly and changed the acquisition window and it is ok now. I am slowly re-building the application code bit by bit from scratch, compiling and loading the code as I go, checking for overruns, etc., and so far everything is ok.

Btw. is there somewhere a Linker file specifically for F28379D with all RAM properly assigned?

0 MatthewPate over 3 years ago in reply to mike buba

TI__Guru* 77460 points

Mike,

Sorry for the delay on our side, alot of us were out last week, and I'm following up on Santosh's threads.

In terms of a superset .cmd file I'd start here C:\ti\c2000\C2000Ware_4_00_00_00\device_support\f2837xd\common\cmd\2837xD_FLASH_lnk_cpu1.cmd

Based on the earlier posts, I think the linker error may persist even if you join multiple RAMs with the "|" operator. This can happen if there is a function that crosses defined boundaries of the defined RAMs, and why the linker will report a size of 0.

If this is still the case, you will need to manually combine RAMs with longer length(I think you mentioned this earlier). You could do this to get the contiguous block to be as big as needed for a particular section.

Let me know if this is on the right track or there's some more digging I need to do.

Best,

Matthew

C2000™︎ microcontrollers

C2000 microcontrollers forum

TMDSCNCD28379D: Program will not fit into available memory; modifying Linker file